Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
A3998
4
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS
1,2
Valid at T
J
= 25°C, V
BB
= 50 V; unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ.
3
Max. Unit
Load Supply Voltage Range V
BB
Operating 9 50 V
Bridge Output On-Resistance R
DS(on)RG
Source driver, I
OUT
= –1.5 A 0.5
Sink driver, I
OUT
= 1.5 A 0.5
VBB Pins Supply Current
I
BB
V
REG
regulated, I
OUT
= 0 mA, outputs on,
PWM = 50 kHz, Duty Cycle = 50%
5 10 mA
I
BBS
Standby mode, regulator active 5 mA
VIN Pin Supply Current I
IN
5 8 mA
Control Logic
Logic Inputs Voltage Range V
IO
Operating 3 5.5 V
Logic Input Voltage
V
IO(1)
V
DD
× 0.55 V
V
IO(0)
V
DD
× 0.27 V
Logic Pins Input Current (Except
ENB1,ENB2, FRST pins)
I
IO
V
IN
= 0 to 5 V –20 <1.0 20 A
ENB1,ENB2, FRST Pins Input Current
I
IO(1)
V
IN
= 3.3 V 66 100 A
I
IO(0)
V
IN
= 0.8 V 16 40 A
Input Hysteresis V
IOHYS
200 700 mV
Propagation Delay Time t
pd
PWM change to source on 350 550 1000 ns
PWM change to source off 35 250 ns
PWM change to sink on 350 550 1000 ns
PWM change to sink off 35 250 ns
Crossover Delay t
COD
300 425 1000 ns
Supply Monitor
Reset Timer t
POR
70 100 130 ms
RSTN and PMON Pins Output
Voltage
V
RST
I
OUT
= 1 mA 0.5 V
RSTN and PMON Pins Output
Leakage Current
I
leakage
V
OUT
= 5 V 1 A
Power Monitor Threshold V
PM(th)
PMON pin, V
BB
falling 12 13 14 V
Power Monitor Hysteresis V
PMHYS
2 V
Protection Circuits
VIN Pin UVLO Threshold V
INUV(th)
V
IN
rising 2.8 3 V
VIN Pin UVLO Hysteresis V
INUVHYS
100 mV
VBB Pins UVLO Threshold V
BBUV(th)
V
BB
rising 6.6 7.1 7.6 V
VBB Pins UVLO Hysteresis V
BBUVHYS
0.7 0.9 1.1 V
FB1 Pin UVLO Threshold V
FBUV(th)
V
FB
falling 698 735 772 mV
FB1 Pin UVLO Hysteresis V
FBUVHYS
100 mV
Thermal Shutdown Temperature T
JSD
155 165 175 °C
Thermal Shutdown Hysteresis T
JSDHYS
20 °C
Continued on the next page…
Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
A3998
5
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
DC to DC Converter
Feedback Voltage Regulation
4
V
FB1
Does not include Cycle Skipping mode
(V = 9 to 50 V, I = 100 mA to 1 A)
0.98 1 1.02 V
Cycle Skipping mode 0.95 1 1.05 V
Feedback Input Bias Current I
FB1
–400 100 nA
Soft Start Duration t
SS
V
BB
= 9 V 5 10 15 ms
Current Limit
I
CLREG
V
FB
> 400 mV 1.5 2.7 A
I
CLFB
V
FB
< 400 mV .5 1.2 A
Fixed Off-time t
OFF
V
OUT
–4 s
Buck Switch On-Resistance R
DS(on)SW
I = 1 A, T
J
= 25°C 0.6
Low Drop-Out Regulator
Feedback Voltage V
FB2
I = 0 to 500 mA .98 1 1.02 V
Internal Current Limit I
CL2
CSN connected to VREG 525 750 mA
External Current Limit Threshold V
CL2
CSN connected to sense resistor 180 200 220 mV
VIN Pin Voltage Range V
IN
V
OUT
+0.6 – 5.5 V
Control Circuit
VREF Pin Input Voltage Range V
REFRNG
Operating 0.0 – 2.6 V
Reference Input Current I
REF
V
REF
= 2.0, V
BB
= 0 to 50 V ±1 A
Transconductance Error
5
Gm
ERR
V
REF
= 2.0, DAC = 15 –4 4 %
V
REF
= 2.0, DAC = 3 –10 10 %
Internal Oscillator Frequency f
osc
3.4 4 4.6 MHz
1
Negative current is defined as coming out of (sourcing) the specified device pin.
2
Specified limits are tested at a single temperature and assured over the range 0°C to 125°C by design and characterization.
3
Typical data is for design information only.
4
Average value of V
OUT
relative to target.
5
Gm
ERR
=[(V
REF
× Current_Ratio / 5) – V
SENSE
] / (V
REF
× Current_Ratio / 5).
ELECTRICAL CHARACTERISTICS
1,2
(continued) Valid at T
J
= 25°C, V
BB
= 50 V; unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ.
3
Max. Unit
Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
A3998
6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
V
OUTxA
I
OUTx
I
OCP
Outputs High-Z
V
ENBx
t
OCP
t
OCP
OCP Fault Latch
OCP Delay
Motor Short
Motor driver outputs
disabled and serial
port reset
Normal DC
Motor Capacitance
SLEEPN
OCP fault latch clears
at SLEEPN edge
Overcurrent Protection (OCP) Timing Diagram
RST Function Timing with FRST Input
Normal Power-up Timing Diagram
FRST
RST
t
POR
V
BB
Charge pump
OK (internal)
V
OUT1
RST
PMON
V
OUT2
t
SS
t
POR

A3998SETTR-T

Mfr. #:
Manufacturer:
Description:
IC MTR DRVR BIPOLAR 3-5.5V 32QFN
Lifecycle:
New from this manufacturer.
Delivery:
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