Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
A3998
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Configuration Register
A configuration register supporting four 16-bit words can be set
using the serial port.
The Configuration register is volatile memory accessed through
the serial port. The bit descriptions are shown in table 1. At a
power-on reset (POR), the bits are set to their default values, all
zeros with the exception of the MSB of the fixed off-time param-
eters, which are set to one.
Motor Driver
Full Bridge Output Current Regulation
Maximum load current is regulated by an Internal PWM mode,
fixed off-time current control circuit. When the outputs of the
DMOS full bridges are turned on, current increases in the motor
winding until it reaches a value given by:
I
TRIP
= V
REF
× Current Ratio / (5 × R
S
) (2)
where R
S
is the value of the sense resistor RS, and the Current
Ratio is as shown in table 2.
At the trip point, the sense comparator resets the source enable
latch, turning off the source driver. At this point, load inductance
causes the current to recirculate for the serial port programmed
fixed off-time period. The current path during recirculation is
determined by the configuration of slow/mixed decay mode and
the synchronous rectification control bits.
Fixed Off-Time
The PWM timer is programmable via the serial port to provide
fixed off-time PWM signals to the A3998 internal control block.
Five bits (word 0/1, D6:D2) are available for each full bridge
to adjust the fixed off-time, t
OFF
, when Internal PWM current
control mode is selected.
The off-time is defined by the following equation:
t
OFF
= (1 + N) × T
OSC
× 8 – T
OSC
(3)
where N is the word value, from 0 to 31, and T
OSC
is the period
of the internal oscillator.
For example, given the internal oscillator frequency, f
OSC
, of
4 MHz (typ) (T
OSC
= 250 ns), the fixed off-time is adjustable
from 2 to 64 s in increments of 2 s.
PWM Control Mode
The selection of Internal or External PWM control mode for each
full bridge is made in the Configuration register.
• Selection of Internal control mode (word 2, D0 and D7) sets
the Internal PWM Decay Mode (Mixed or Slow), and allows
the configuration of Fixed Off-Time and Fast Decay Time. In
Mixed Decay mode, during the first portion of the off-time
period, the A3998 operates in Fast Decay mode, until the Fast
Decay time count is reached. The rest of the fixed off-time pe-
riod the A3998 operates in Slow Decay mode. If the Fast Decay
Time duration is longer than the Fixed Off-Time duration, the
device effectively operates in Fast Decay mode throughout the
period.
• Selection of External control mode (word 2, D1 and D8) sets
the External PWM Decay Mode (Fast or Slow). In this mode, a
chopping signal on the Enable pins (ENBx) are used to provide
external PWM current control.
A. Minimum Data Setup Time 15 ns
B. Minimum Data Hold Time 10 ns
C. Minimum Setup Strobe to Clock Rising Edge 50 ns
D. Minimum Clock High Pulse Width 50 ns
E. Minimum Clock Low Pulse Width 50 ns
F. Minimum Setup Clock Rising Edge to Strobe 50 ns
G. Minimum Strobe Pulse Width 50 ns
H. Minimum Sleep to Clock Setup Time 100 ns
B
LSB - D0MSB
DATA
CLK
STB
A
C
D E
F
G
SLEEPN
H
Figure 4. Serial Port Timing Diagram
