Data Sheet ADG774A
Rev. C | Page 9 of 14
TEST CIRCUITS
I
DS
V1
SD
V
S
R
ON
= V1/I
DS
02373-019
Figure 16. On Resistance
SD
V
S
A
A
V
D
I
S
(OF
F
)I
D
(OFF)
02373-020
Figure 17. Off Leakage
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
02373-021
Figure 18. On Leakage
0.1µF
V
DD
GND
EN
50
V
OUT
V
S
IN
D1
V
IN
S1A
ADG774A
50
NETWORK
ANALYZER
0
2373-024
Figure 19. Bandwidth
0.1µF
DD
GND
EN
50
V
OUT
V
S
IN
D1
V
IN
S1A
ADG774A
50
NETWORK
ANALYZER
50
02373-025
Figure 20. Off Isolation
0.1µF
DD
GND
EN
IN
V
IN
R
L
50
V
S
D2
S1A
ADG774A
D1
50
NETWORK
ANALYZER
V
OUT
S2A
50
02373-026
Figure 21. Channel-to-Channel Crosstalk
ADG774A Data Sheet
Rev. C | Page 10 of 14
0.1µF
5
V
V
S
IN
SD
V
DD
GND
R
L
100
C
L
35pF
V
OUT
EN
3V
50% 50%
90% 90%
V
IN
V
OUT
t
ON
t
OFF
02373-022
Figure 22. Switching Times
0.1µF
5
V
V
S
EN
S1A
D1
V
DD
GND
R
L
100
C
L
35pF
V
OUT
S1B
DECODER
V
S
80% 80%
V
IN
V
OUT
t
D
t
D
50% 50%
3V
0V
V
S
0
2373-023
Figure 23. Break-Before-Make Time Delay
5
V
EN
S1A
V
DD
C
L
1nF
S1B
V
IN
V
OUT
3V
Q
INJ
= C
L
× V
OUT
V
OUT
C
L
1nF
C
L
1nF
C
L
1nF
D1 V
OUT
D2 V
OUT
D3 V
OUT
D4 V
OUT
ADG774A
1 OF 2
DECODER
IN
S2A
S2B
S3A
S3B
S4A
S4B
V
S
R
S
02373-027
Figure 24. Charge Injection
Data Sheet ADG774A
Rev. C | Page 11 of 14
TERMINOLOGY
V
DD
Most positive power supply potential.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
EN
Logic control input.
R
ON
Ohmic resistance between D and S.
R
ON
On resistance match between any two channels, that is,
R
ON
max − R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
I
S
(OFF)
Source leakage current with the switch off.
I
D
(OFF)
Drain leakage current with the switch off.
I
D
, I
S
(ON)
Channel leakage current with the switch on.
V
D
(V
S
)
Analog voltage on the D and S terminals.
C
S
(OFF)
Off switch source capacitance.
C
D
(OFF)
Off switch drain capacitance.
C
D
, C
S
(ON)
On switch capacitance.
t
ON
Delay between applying the digital control input and the output
switching on. See Figure 22.
t
OFF
Delay between applying the digital control input and the output
switching off.
t
D
Off time or on time measured between the 80% points of both
switches when switching from one address state to another. See
Figure 23.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another because of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
Frequency response of the switch in the on state measured at
3 dB down.
Distortion
R
FLAT(ON)
/R
L

ADG774ABRQZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Multiplexer Switch ICs 2:1 400MHz 2.2 Ohm Quad CMOS
Lifecycle:
New from this manufacturer.
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