LT3905
13
3905fa
For more information www.linear.com/LT3905
Figure 5. APD Current Limiter Response
applicaTions inForMaTion
Although this greatly reduces the energy dissipated in the
APD during overload, care must be taken that any bypass
capacitors directly on the APD do not cause the overload
surge to exceed recommended values.
In the case of a hard short on the APD pin, the APD pin
current is regulated and the boost converter will not switch,
but for high input voltages, the DC path from the input
through the inductor and Schottky rectifier will continue
to supply current to the shorted load. If this current is
larger than the programmed current limit, the device will
continue to regulate the output current of the APD pin,
and to assert the ILIM flag until the short on the APD pin
is removed.
APD Current Monitor Transient Response
The transient response of the APD current monitor is a
key performance characteristic. It is essentially a func
-
tion of the signal levels, since the small signal bandwidth
increases with the input signal.
At
greater than 10µA, the LT3905 APD current mirror
typically has several hundred nanosecond response time.
To measure such fast transient response, a wideband tran
-
simpedance amplifier
is implemented using the LT6210 as
shown in Figure 6. Operating in a shunt configuration, the
amplifier buffers the MON output and dramatically reduces
the effective output impedance. Note that there is an inver
-
sion and DC reference offset in the final measurement.
Layout Hints
The
high speed operation of the LT3905 demands care
-
ful attention to board layout. You will not get advertised
performance with careless layout. To prevent radiation
Figure 8. High Frequency Path
Figure 7. Typical 10μA to 1mA Step Transient Response
and high frequency resonance problems, proper layout
of the high frequency switching path is essential. Keep
the output capacitor as close to the Schottky diode (V
OUT
pin) as possible. Minimize the length and area of all traces
connected to the switch pin, and always use a ground
plane under the switching regulator to minimize interplane
coupling. The high speed switching current path is shown
in Figure8. The signal path including the switch, output
diode and output capacitor contains nanosecond rise and
fall times and should be kept as short as possible.
OUT
HIGH
FREQUENCY
CIRCULATING
PATH
SW
V
IN
LOAD
Figure 6. Transient Response Measurement Setup
LT3905
APDMON
1k
4.99k
0.1µF
2V
V
V
L
4.99k
+
–
LT6210
0.5pF
V
APD
V
OUT
ILIM
I
LIM_MON
I
APD
= 10µA
t
HL
~ 120ns
I
APD
= 1mA
100ns/DIV
3905 G14
RESPONSE
