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pin FuncTions
ILIM (Pin 1): Open Drain Overload Indicator. ILIM pulls
low when the voltage on ILIM_MON reaches the 1.348V
threshold, and releases when ILIM_MON drops by 50mV.
Tie this pin to desired logic high voltage with an external
pull-up resistor. The maximum recommended sink current
is 2mA to prevent excess power dissipation. Leave this
pin open if unused.
LOS_MON (Pin 2): Loss of Signal Monitor. This pin sources
a current proportional to 10% of the APD current, and acts
as the positive input for the Loss of Signal comparator.
It is clamped to 2.25V through an internal diode. Tie a
resistor from LOS_MON to GND to set the Loss of Signal
gain. Tie this pin to GND if unused.
ILIM_MON (Pin 3): APD Overload Monitor. This pin sources
a current proportional to 5% of the APD current, and acts
as the negative input for the current regulation loop and
the APD current limiter. It is clamped to 2.25V through an
internal diode. Tie a resistor from ILIM_MON to GND to
set the gain. If ILIM_MON exceeds the 1.248V setpoint,
the current regulation loop will first throttle back the boost
converter output voltage. If ILIM_
MON reaches the
1.348V
threshold, the ILIM indicator is pulled low and the APD
current is actively limited. This pin cannot be allowed to
float, tie this pin to GND if unused.
MON (Pin 4): Current Monitor Output Pin. This pin sources
a current proportional to 20% of the APD current for ex
-
ternal current monitoring. It is clamped to 2.25V through
an internal diode. Tie a resistor from MON to GND to set
the current monitor gain.
APD (Pin 5): Connect APD cathode to this pin. The maxi
-
mum current of this pin is 7mA (typ).
MONIN (
Pin 6): Power Supply for the APD and All Current
Monitors. Connect to V
OUT
through an external lowpass
filter for lowest noise operation.
SW (Pin 7): Switch Pin. Drain of internal power FET and
anode of internal power Schottky. Connect to switching
side of inductor. Minimize the trace length on this pin to
reduce EMI.
V
OUT
(Pin 8): Boost Converter Output Pin. Cathode of inter-
nal power Schottky. Connect an output voltage smoothing
capacitor from V
OUT
to GND.
GND (Pin 9, Exposed Pad Pin 17): Ground. Tie to the
exposed pad. The exposed pad must be soldered to a large
PCB copper area for proper functionality and heat sinking.
V
IN
(Pin 10): Input Supply Pin. Bypass this pin with a
capacitor to GND as close to the IC as possible.
EN/UVLO (Pin 11): Master Enable and V
IN
Undervoltage
Lockout. When low, the IC is put into shutdown mode and
quiescent current is reduced to <1µA. This pin contains
a 1.2V comparator with 25mV internal hysteresis and a
3µA hysteresis current source for programmable external
hysteresis. Connect to a resistor divider between V
IN
and
GND to program the enable/disable thresholds, or drive
with a digital signal greater than 1.5V for simple ON/OFF
control.
CTRL (Pin 12): External Reference Input. When CTRL is
lower than 1.248V, it acts as an external reference to the
FB error amp. If unused, tie CTRL to V
IN
.
LOS (Pin 13): Open Drain Loss of Signal Indicator. LOS
goes high when the voltage on LOS_MON is below the
voltage on LOS_ADJ. Tie this pin to desired logic high
voltage with an external pull-up resistor. The maximum
recommended sink current is 2mA to prevent excess power
dissipation. Leave this pin open if unused.
LOS_ADJ (Pin 14): External Reference Input for the Loss
of Signal Indicator. This pin
feeds the negative input of
the
loss of signal comparator, and provides 20mV internal
hysteresis. For additional external hysteresis, use a resistor
network between LOS and LOS_ADJ. Tie this pin to V
IN
for a fixed 1.248V threshold, or if unused.
FB (Pin 15): Feedback Pin. Connect to a resistor divider
between V
OUT
and GND to limit the output voltage. The
internal reference for this pin is 1.248V. Pull this pin above
1.8V to disable the step-up converter and operate the Loss
of Signal monitor standalone.
f
SEL
(Pin 16): Frequency Selector. Tie to V
IN
for 2MHz
operation, or tie to GND for 1MHz operation.
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V
OUT
FB
PWM
COMPARATOR
ILIM = 400mA
STBY
CTRL
MONIN
3905 F01
GND
1.348V
1.8V
EN/UVLO
SHDN
f
SEL
V
IN
SW
LOS_ADJ
LOS
ILIM
APD
ILIM_MON LOS_MON MON
+
+
+
1.248V
1.2V
3µA
+
1.248V
R
C
VC
10µA
C
C
+
+
+
+
S
OSC
CURRENT MIRROR
2.25V
UPPER
CLAMPS
1:101:20 11:5
1k
ILIM
R Q
CSA
CV EAMP
1.248V
+
1k
1k
CC EAMP
block DiagraM
Figure 1. Block Diagram
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operaTion
applicaTions inForMaTion
Overview
The LT3905 combines a 65V current mode step-up DC/DC
converter with a combination APD current monitor and
regulator to provide accurate monitoring and efficient
supply while offering additional flexibility and protection.
The step-up converter utilizes a 65V, 0.75Ω DMOS power
switch and integrated Schottky diode to convert a low input
voltage to a higher voltage appropriate for powering the
APD. The operation of the step-up converter is a fixed fre
-
quency, current mode topology with internal compensation
and accurate current limit. Operation is best understood
by referring to the Block Diagram in Figure 1.
At the start of each oscillator cycle, the SR latch is set,
which turns on the internal DMOS power switch. Current
begins to rise in the inductor and power switch, and this
switch current is sensed and added to a stabilizing ramp.
The resulting sum is fed to the positive terminal of the
PWM comparator. The level at the negative terminal of
the PWM comparator is set by the integrated error sig
-
nal, VC. When the
current sense signal exceeds the VC
threshold or the fixed 400mA current limit, the SR latch
is reset and the power switch turns off for the
remainder
of the
cycle. The stored energy in the inductor transfers
through the Schottky diode to the output capacitor, rais-
ing the output
voltage.
This output voltage is externally filtered and returned to
the current monitor through the MONIN pin. The avalanche
photodiode is then biased from the APD pin, which allows
the monitor to both sense the APD current as well as to
limit it in an overload condition.
The monitor provides three currents proportional to
APD current on the MON (1:5), LOS_MON (1:10), and
ILIM_MON (1:20) pins. Resistors at these pins convert
the output currents to voltages suitable for monitoring and
regulating the APD current. In addition, the LOS_MON and
ILIM_MON have special functions used for loss-of-signal
and overload cases. These functions are described in detail
in the sections regarding these pins.
The step-up converter output is controlled through either
the FB or ILIM_MON voltages. A fixed or maximum output
voltage is programmed using the FB pin, and an adaptive
output voltage for fixed APD current is programmed using
the ILIM_MON pin.
The reference voltage for the FB pin can also be supplied
externally through the CTRL pin, for external adjustment
of
output voltage.
Switching Frequency
The LT3905 allows selection between 1MHz and 2MHz
switching frequency. Tie the f
SEL
pin to a voltage greater
than 0.9V to select 2MHz mode, or tie to GND to select
1MHz mode.
Inrush Current
Due to the Schottky diode in the boost converter, a DC
path exists from V
IN
to V
OUT
through the power inductor.
When supply voltage is applied to the V
IN
pin, an inrush
current will flow through the inductor to charge the output
capacitor.
The selection of inductor and capacitor should be chosen
to keep the peak inrush current below 1A. The peak in-rush
current is estimated as follows:
I
p
=
V
IN
0.9
sqrt
L
C
1
e
–pi
2 sqrt
L
C
1
Where L is the power inductor value, and C is the output
capacitor value.
Table 1 gives inrush peak currents for some typical com-
ponent values.

LT3905EUD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 60V Boost DC-DC Converter with APD Current Monitor
Lifecycle:
New from this manufacturer.
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