Document #: 001-43258 Rev. *E Page 4 of 13
General Description
Four Configurable PLLs
The CY25404 has four programmable PLLs that can be used to
generate output frequencies ranging from 3 to 166 MHz. The
advantage of having four PLLs is that a single device generates
up to four independent frequencies from a single crystal.
Input Reference Clocks
The input to the CY25404 can be either a crystal or a clock
signal. The input frequency range for crystals is 8 MHz to 48
MHz, while that for clock signals is 8 MHz to 166 MHz. The
required voltage level for the input reference clock (EXCLKIN) is
shown in the DC and AC Electrical Specification tables.
V
DD
Power Supply Options
This device has programmable power supply option and it can
be programmed to operate at any voltage 2.5 V, 3.0 V, or 3.3 V.
Output Bank Settings
There are nine clock outputs grouped in three output driver
banks. The Bank 1, Bank 2, and Bank 3 correspond to (CLK1,
CLK2, CLK3), (CLK4, CLK5, CLK6), and (CLK7, CLK8, CLK9)
respectively. Separate power supplies are used for each of these
banks and they can be any of 1.8 V, 2.5 V, 3.0 V, or 3.3 V. These
voltages are independent of V
DD
power supply used, giving user
multiple choice of output clock voltage levels.
Output Source Selection
These devices have programmable input sources for each of its
nine clock outputs (CLK1–9). There are five available clock
sources for these outputs. These clock sources are:
XIN/EXCLKIN, PLL1, PLL2, PLL3, or PLL4. Output clock source
selection is done using four out of five crossbar switch. Thus, any
one of these five available clock sources can be arbitrarily
selected for the clock outputs. This gives user a flexibility to have
up to four independent clock outputs.
Spread Spectrum Control
Two of the four PLLs (PLL3 and PLL4) have spread spectrum
capability for EMI reduction in the system. The device uses a
Cypress proprietary PLL and spread spectrum clock (SSC)
technology to synthesize and modulate the frequency of the PLL.
The spread spectrum feature can be turned on or off using a
multifunction control pin (CLK7/SSON). It can be programmed to
either center spread range from ±0.125% to ±2.50% or down
spread range from –0.25% to –5.0% with Lexmark or Linear
profile.
Frequency Select
There are three multifunction frequency select pins (FS0, FS1
and FS2) that provide an option to select eight different sets of
frequencies among each of the four PLLs. Each output has
programmable output divider options.
Glitch-Free Frequency Switch
When the frequency select pin (FS) is used to switch frequency,
the outputs are glitch-free provided frequency is switched using
output dividers. This feature enables uninterrupted system
operation while clock frequency is being switched.
Output Enable Mode
There is a multifunction programmable pin 10, OE/FS1 that can
be programmed to operate as output enable (OE) mode. OE is
a high-true input and individual clock outputs can be
programmed to be sensitive to this OE pin. If activated it shuts
off the output drivers, resulting in minimum power consumption
for the device.
Output Drive Strength
The DC drive strength of the individual clock output can be
programmed for different values. Table 2 shows the typical rise
and fall times for different drive strength settings.
Generic Configuration and Custom Frequency
There is a generic set of output frequencies available from the
factory that can be used for the device evaluation purposes. The
device, CY25404 can be custom programmed to any desired
frequencies and listed features. For customer specific
programming, please contact local cypress field application
engineer (FAE) or sales representative.
Table 2. Output Drive Strength
Output Drive Strength
Rise/Fall Time (ns)
(Typical Value)
Low 6.8
Mid Low 3.4
Mid High 2.0
High 1.0
