ICS841202-245 Data Sheet CRYSTAL-TO-HCSL CLOCK SYNTHESIZER
ICS841202BK-245 REVISION A AUGUST 20, 2013 13 ©2013 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS841202-245.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS841202-245 is the sum of the core power plus the power dissipated into the load.
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated into the load.
Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
) = 3.465V *(158mA + 20mA) = 616.77mW
•Power (outputs)
MAX
= 44.5mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 44.5mW = 89mW
Total Power_
MAX
= 616.77mW + 89mW = 705.77mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire a nd bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 43.4°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with a ll outputs switching is:
70°C + 0.706W * 43.4°C/W = 100.6°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, su
pply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance
JA
for 32 Lead VFQFN, Forced Convection
JA
vs. Air Flow
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 43.4°C/W 37.9°C/W 34.0°C/W
