OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

9ZXL1530BKLFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
9ZXL1530
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
IDT®
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE 4
9ZXL1530 REV D 112015
Pin Descriptions (cont.)
PIN # PIN NAME TYPE DESCRIPTION
33 DIF_5 OUT 0.7V differential true clock output
34 DIF_5# OUT 0.7V differential Complementary clock output
35 GND PWR Ground pin.
36 VDDIO PWR Power supply for differential outputs
37 DIF_6 OUT 0.7V differential true clock output
38 DIF_6# OUT 0.7V differential Complementary clock output
39 DIF_7 OUT 0.7V differential true clock output
40 DIF_7# OUT 0.7V differential Complementary clock output
41 VDD PWR Power supply, nominal 3.3V
42 GND PWR Ground pin.
43 DIF_8 OUT 0.7V differential true clock output
44 DIF_8# OUT 0.7V differential Complementary clock output
45 DIF_9 OUT 0.7V differential true clock output
46 DIF_9# OUT 0.7V differential Complementary clock output
47 GND PWR Ground pin.
48 VDDIO PWR Power supply for differential outputs
49 DIF_10 OUT 0.7V differential true clock output
50 DIF_10# OUT 0.7V differential Complementary clock output
51 VDDIO PWR Power supply for differential outputs
52 GND PWR Ground pin.
53 DIF_11 OUT 0.7V differential true clock output
54 DIF_11# OUT 0.7V differential Complementary clock output
55 DIF_12 OUT 0.7V differential true clock output
56 DIF_12# OUT 0.7V differential Complementary clock output
57 GND PWR Ground pin.
58 VDD PWR Power supply, nominal 3.3V
59 DIF_13 OUT 0.7V differential true clock output
60 DIF_13# OUT 0.7V differential Complementary clock output
61 DIF_14 OUT 0.7V differential true clock output
62 DIF_14# OUT 0.7V differential Complementary clock output
63 VDDIO PWR Power supply for differential outputs
64 GND PWR Ground pin.
9ZXL1530
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
IDT®
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE 5
9ZXL1530 REV D 112015
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9ZXL1530. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over
the recommended operating temperature range.
Electrical Characteristics–DIF_IN Clock Input Parameters
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX
UNITS NOTES
3.3V Core Supply Voltage VDDA, R 4.6 V 1,2
3.3V Logic Supply Voltage VDD 4.6 V 1,2
I/O Supply Voltage VDDIO 4.6 V 1,2
Input Low Voltage V
IL
GND-0.5 V
1
Input High Voltage V
IH
Except for SMBus interface V
DD
+0.5V V 1
Input High Voltage V
IHSM B
SMBus clock and data pins 5.5V V 1
Storage Temperature Ts -65 150
°
C
1
Junction Temperature Tj 125 °C 1
Input ESD protection
ESD prot Human Body Model 2000 V
1
1
Guaranteed b
y
desi
g
n and characterization, not 100% tested in
p
roduction.
2
O
p
eration under these conditions is neither im
p
lied n or
g
uaranteed.
TA = T
COM
; Supply Voltage VDD/VDDA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading Conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Input Crossover Voltage -
DIF_IN
V
CROSS
Cross Over Voltage 150 900 mV 1
Input Swing - DIF_IN V
SWING
Differential value 300 mV 1
Input Slew Rate - DIF_IN dv/dt Measured differentially 0.4 8 V/ns 1,2
Input Leakage Current I
IN
V
IN
= V
DD ,
V
IN
=
GND -5 5 uA
Input Duty Cycle d
tin
Measurement from differential wavefrom 45 55 % 1
Input Jitter - Cycle to Cycle J
DIFI n
Differential Measurement 0 125 ps 1
1
Guaranteed by desi
g
n and characterization, not 100% tested in production.
2
Slew rate measured throu
g
h +/-75mV window centered around differential zero
9ZXL1530
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
IDT®
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE 6
9ZXL1530 REV D 112015
Electrical Characteristics–Input/Supply/Common Output Parameters
TA = T
COM
; Supply Voltage VDD/VDDA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading Conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Ambient Operating
Tem
p
erature
T
COM
Commmercial range 0 70 °C 1
Input High Voltage
V
IH
Single-ended inputs, except SMBus, low threshold
and tri-level in
p
uts
2
V
DD
+ 0.3
V1
Input Low Voltage V
IL
Single-ended inputs, except SMBus, low threshold
and tri-level in
p
uts
GND
- 0.3 0.8 V 1
I
IN
Single-ended inputs, V
IN
= GND, V
IN
= VDD -5 5 uA 1
I
IN P
Sin gle -e nded inp uts
V
IN
= 0 V; Inputs with internal pull-u p resistors
V
IN
= VDD; Input s with internal pull-down resistors
-200 200 uA 1
F
ibyp
V
DD
= 3.3 V, Bypass mode
33 150 MHz 2
F
ip ll
V
DD
= 3.3 V, 100MHz PLL mode 90 100.00 110 MHz 2
F
ip ll
V
DD
= 3.3 V, 133.33MHz PLL mode
120 133.33 147 MHz 2
Pin Inductance
L
p
in
7nH1
C
IN
Logic Inputs, except DIF_IN 1.5 5 pF 1
C
IN DIF _IN
DIF_IN differential clock inputs 1.5 2.7 pF 1,4
C
OUT
Output pin capacitance 6 pF 1
C lk Sta bilization
T
STAB
From V
DD
Power-Up and after input clock
stabilization or de-assertion of PD# to 1st clock
1ms1,2
Input SS Modulation
Frequency
f
MOD IN
Allowable Frequency
(Triangular Modulation)
30 33 kHz 1
Tdrive_PD#
t
DRVPD
DIF outp ut enable afte
r
PD# de-assertion
300 us 1,3
Tfall t
F
Fall time of control inputs 5 ns 1,2
Trise
t
R
Rise time of control inputs 5 ns 1,2
SMBus Input Low Voltage
V
IL SMB
0.8 V 1
SMBus Input High Voltage V
IHSM B
2.1 V
DD SMB
V1
SMBus Output Low Voltage
V
OL S MB
@ I
PU LLU P
0.4 V 1
SMBus Sink Current I
PUL LUP
@ V
OL
4mA1
Nominal Bus Voltage
V
DDSMB
3V to 5V +/- 10% 2.7 5.5 V 1
SCLK/SDATA Rise Time t
RSMB
(Max VIL - 0.15) to (Min VIH + 0.15) 1000 ns 1
SCLK/SDATA Fall Time
t
FSMB
(Min VIH + 0.15) to (Max VIL - 0.15) 300 ns 1
SMBus Operating Frequency
f
MINSM B
Minimum SMBus operating frequency 100 kHz 1,5
1
Guaranteed b
y
desi
g
n and characterization, not 100% tested in
p
roduction.
2
Control in
p
ut must be monotonic from 20% to 80% of in
p
ut swin
g
.
5
Th e differential input clock must be running for the SMBus to be active
Input Current
3
Time from deassertion until outputs are >200 mV
4
DIF_IN input
Capacitance
Inpu t Frequen cy
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

9ZXL1530BKLFT

Mfr. #:
Buy 9ZXL1530BKLFT
Manufacturer:
IDT
Description:
Clock Buffer HIGH PERF. ZDB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet