Data Sheet ADF4360-7
Rev. E | Page 17 of 28
POWER-UP
Power-Up Sequence
The correct programming sequence for the ADF4360-7 after
power-up is:
1. R counter latch
2. Control latch
3. N counter latch
Initial Power-Up
Initial power-up refers to programming the device after the
application of voltage to the AV
DD
, DV
DD
, V
VCO
and CE pins. On
initial power-up, an interval is required between programming
the control latch and programming the N counter latch. This
interval is necessary to allow the transient behavior of the
ADF4360-7 during initial power-up to settle.
During initial power-up, a write to the control latch powers up
the device, and the bias currents of the VCO begin to settle. If
these currents have not settled to within 10% of their steady-
state value, and if the N counter latch is then programmed, the
VCO may not oscillate at the desired frequency, which does not
allow the band select logic to choose the correct frequency
band, and the ADF4360-7 may not achieve lock. If the recom-
mended interval is inserted, and the N counter latch is pro-
grammed, the band select logic can choose the correct frequen-
cy band, and the device locks to the correct frequency.
The duration of this interval is affected by the value of the ca-
pacitor on the C
N
pin (Pin 14). This capacitor is used to reduce
the close-in noise of the ADF4360-7 VCO. The recommended
value of this capacitor is 10 µF. Using this value requires an in-
terval of ≥10 ms between the latching in of the control latch bits
and latching in of the N counter latch bits. If a shorter delay is
required, the capacitor can be reduced. A slight phase noise
penalty is incurred by this change, which is further explained in
the Table 10.
Table 10. C
N
Capacitance vs. Interval and Phase Noise
C
N
Value
Recommended Interval Between
Control Latch and N Counter Latch
Open-Loop Phase Noise at 10 kHz
Offset (L1 and L2 = 1.0 nH)
Open-Loop Phase Noise at 10 kHz
Offset (L1 and L2 = 13.0 nH)
10 µF ≥10 ms −90 dBc −99 dBc
CLOCK
POWER-UP
DATA
LE
R COUNTER
LATCH DATA
CONTROL
LATCH DATA
N COUNTER
LATCH DATA
REQUIRED INTERVAL
CONTROL LATCH WRITE TO
N COUNTER LATCH WRITE
04441-026
Figure 22. ADF4360-7 Power-Up Timing
