ADF4360-7 Data Sheet
Rev. E | Page 4 of 28
Parameter B Version Unit Test Conditions/Comments
RF OUTPUT CHARACTERISTICS
5
Maximum VCO Output Frequency 1800 MHz
I
CORE
= 5 mA. Depending on L. See the Choosing the Correct
Inductance Value section.
Minimum VCO Output Frequency 350 MHz
VCO Output Frequency 490/585 MHz min/max
L1, L2 = 13 nH. See the Choosing the Correct Inductance Value
section for other frequency values.
VCO Frequency Range 1.2 Ratio F
MAX
/F
MIN
VCO Sensitivity 12 MHz/V typ
L1, L2 = 13 nH. See the Choosing the Correct Inductance Value
section for other sensitivity values.
Lock Time
6
400 µs typ To within 10 Hz of final frequency.
Frequency Pushing (Open Loop)
Frequency Pulling (Open Loop) 15 kHz typ Into 2.00 VSWR load.
Harmonic Content (Second) −19 dBc typ
Harmonic Content (Third) −9 dBc typ
Output Power
5, 7
−14/−5 dBm typ Programmable in 3 dB steps. See Table 7.
Output Power Variation ±3 dB typ For tuned loads, see Output Matching section.
VCO Tuning Range 1.25/2.5 V min/max
NOISE CHARACTERISTIC
5
VCO Phase-Noise Performance
8
At 100 kHz offset from carrier.
−138 dBc/Hz typ At 1 MHz offset from carrier.
−144 dBc/Hz typ At 3 MHz offset from carrier.
−148 dBc/Hz typ At 10 MHz offset from carrier.
Synthesizer Phase-Noise Floor
9
−172 dBc/Hz typ At 25 kHz PFD frequency.
−163 dBc/Hz typ At 200 kHz PFD frequency.
In-Band Phase Noise
10, 11
−92 dBc/Hz typ At 1 kHz offset from carrier.
RMS Integrated Phase Error
12
0.3 Degrees typ 100 Hz to 100 kHz.
Spurious Signals due to PFD Fre-
quency
11, 13
−70 dBc typ
Level of Unlocked Signal with
MTLD Enabled
−44 dBm typ
1
Operating temperature range is –40°C to +85°C.
2
Guaranteed by design. Sample tested to ensure compliance.
3
I
CP
is internally modified to maintain constant loop gain over the frequency range.
4
T
A
= 25°C; AV
DD
= DV
DD
= V
VCO
= 3.3 V; P = 32.
5
Unless otherwise stated, these characteristics are guaranteed for VCO core power = 5 mA. L1, L2 = 13 nH, 470 Ω resistors to GND in parallel with L1, L2.
6
Jumping from 490 MHz to 585 MHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7
Using 50 Ω resistors to V
VCO
, into a 50 Ω load. For tuned loads, see the Output Matching section.
8
The noise of the VCO is measured in open-loop conditions.
9
The synthesizer phase-noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value).
10
The phase noise is measured with the EV-ADF4360-7EB1Z Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REF
IN
for the
synthesizer; offset frequency = 1 kHz.
11
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; N = 2500; loop B/W = 10 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 1 MHz; N = 500; loop B/W = 25 kHz.
13
The spurious signals are measured with the EV-ADF4360-7EB1Z Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REF
IN
for
the synthesizer; f
REFOUT
= 10 MHz at 0 dBm.
