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NB3V1102CDTR2G

P1-P3P4-P6P7-P9P10-P12P13-P13
© Semiconductor Components Industries, LLC, 2017
January, 2017 − Rev. 3
1 Publication Order Number:
NB3V1102C/D
NB3V110xC Series
3.3V/2.5V/1.8V LVCMOS
Low Skew Fanout Buffer
Family
Description
The NB3V110xC are a modular, high−performance, low−skew,
general purpose LVCMOS clock buffer family. The family of devices
is designed with a modular approach. Four different fan−out
variations, 1:2, 1:3, 1:4, 1:6 and 1:8, are available. All of the devices
are pin compatible to each other for easy handling. All family
members share the same high performing characteristics like low
additive jitter, low skew, and wide operating temperature range. The
NB3V110xC supports an asynchronous output enable control (OE)
which switches the outputs into a low state when OE is low. The
NB3V110xC devices operate in a 3.3 V, 2.5 V and 1.8 V environment
and are characterized for operation from −40°C to 105°C.
Features
• Operating Temperature Range: –40°C to 105°C
• High−Performance 1:2, 1:3, 1:4, 1:6, 1:8 LVCMOS Clock Buffer
• Available in 8−, 14−, 16−Pin TSSOP and WDFN8 Packages
• Very Low Output−to−Output Skew < 50 ps
• Very Low Additive Jitter < 200 fs
• Supply Voltage: 3.3 V, 2.5 V or 1.8 V
• f
max
= 250 MHz for 3.3 V; f
max
= 180 MHz for 2.5 V;
f
max
= 133 MHz for 1.8 V
• These Devices are Pb−Free and are RoHS Compliant
BLOCK DIAGRAM
Q0
Q1
Q2
Q3
Qn
CLKIN
LV
CMOS
OE
LV
CMOS
LV
CMOS
LV
CMOS
LV
CMOS
LV
CMOS
S
S
S
www.onsemi.com
See detailed ordering, marking and shipping information on
page 9 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
A = Assembly Location
M = Date Code
L = Wafer Lot
Y = Year
W, WW = Work Week
G = Pb−Free Package
TSSOP−14
TSSOP−8
1106
V
ALYWG
G
1
14
(Note: Microdot may be in either location)
TSSOP−16
DT SUFFIX
CASE 948F
TSSOP−8
DT SUFFIX
CASE 948S
10x
YWW
AG
1
8
WDFN8, 2x2
MT SUFFIX
CASE 511AT
0X MG
G
1
WDFN8
TSSOP−14
DT SUFFIX
CASE 948G
1108
V
ALYWG
G
1
16
TSSOP−16
NB3V110xC Series
www.onsemi.com
2
NB3V1102C
NB3V1103C
NB3V1104C
NB3V1106C
Figure 1. Pin Configuration
TSSOP−14
TSSOP−8 and WDFN8
1
2
3
4
8
7
6
5
CLKIN
OE
Q0
GND
Q1
NC/Q3
VDD
NC/Q2
CLKIN
OE
Q0
GND
VDD
Q4
GND
Q1
Q3
VDD
Q2
GND
Q5
VDD
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NB3V1108C
TSSOP−16
CLKIN
OE
Q0
GND
VDD
Q4
GND
Q1
Q3
VDD
Q2
GND
Q5
VDD
1
2
3
4
5
6
7
14
13
12
11
10
9
15
Q6
Q7
8
16
Table 1. PIN DESCRIPTION
Devices
LVCMOS Clock
Input
LVCMOS Clock
Output Enable
LVCMOS Clock Output
Device
Supply Voltage
Device
Ground
CLKIN OE Q0, Q1, ... Q7 VDD GND
NB3V1102C 1 2 3, 8 6 4
NB3V1103C 1 2 3, 8, 5 6 4
NB3V1104C 1 2 3, 8, 5, 7 6 4
NB3V1106C 1 2 3, 14, 11, 13, 6, 9 5, 8, 12 4, 7, 10
NB3V1108C 1 2 3, 16, 13, 15, 6, 11, 8, 9 5, 10, 14 4, 7, 12
NOTE: Pins not mentioned in the table are NC.
Table 2. OUTPUT LOGIC TABLE
INPUTS OUTPUTS
CLKIN OE Qn
X L L
L H L
H H H
Table 3. ATTRIBUTES
Characteristic Value Unit
ESD Protection Human Body Model (HBM) per ANSI/ESDA/JEDEC JS−001−2014
Charged Device Model (CDM) per ANSI/ESDA/JEDEC JS−002−2014
5000
1500
V
V
Moisture Sensitivity, Indefinite Time Out of Dry Pack (Note 1) Level 1 −
Meets or exceeds JEDEC Spec JESD78D (LU) IC Latchup Test
1. JEDEC standard multilayer board – 2S2P (2 signal, 2 power) with a large copper heat spreader (20 mm
2
, 2 oz.)
NB3V110xC Series
www.onsemi.com
3
Table 4. ABSOLUTE MAXIMUM RATINGS (Note 2)
Over operating free−air temperature range (unless otherwise noted)
Symbol Condition Value Unit
V
DD
Supply Voltage Range –0.5 to 4.6 V
V
IN
Input Voltage Range (Note 3) –0.5 to V
DD
+ 0.5 V
V
O
Output Voltage Range (Note 3) –0.5 to V
DD
+ 0.5 V
I
IN
Input Current ±20 mA
I
O
Continuous Output Current ±50 mA
q
JA
Thermal Resistance (Junction−to−Ambient)
TSSOP−8 151.2*
°C/W
TSSOP−14 104*
TSSOP−16
32*
110**
WDFN8 190**
q
JC
Thermal Resistance (Junction−to−Case top)
TSSOP−8 35
°C/W
TSSOP−14 8.6
TSSOP−16 10
WDFN8 10
T
J
Maximum Junction Temperature 125 °C
T
STG
Storage Temperature Range –65 to 150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board – 2S2P (2 signal, 2 power) with a large copper heat spreader (20 mm
2
, 2 oz.)
3. For additional information, see Application Note AND8003/D.
*JEDEC51.7 four layer PCB with 100 sqmm, 2 oz with two 80x80x1oz ground planes.
**JEDEC51.3 two layer PCB with 100 sqmm, 2 oz.
P1-P3P4-P6P7-P9P10-P12P13-P13

NB3V1102CDTR2G

Mfr. #:
Buy NB3V1102CDTR2G
Manufacturer:
ON Semiconductor
Description:
Clock Buffer FANOUT BUFFER WITH 2
Lifecycle:
New from this manufacturer.
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