BUK9620-100B_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 6 May 2009 5 of 12
NXP Semiconductors
BUK9620-100B
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source
breakdown voltage
I
D
=0.25mA; V
GS
=0V; T
j
=25°C 100 - - V
I
D
=0.25mA; V
GS
=0V; T
j
=-55°C 90 - - V
V
GS(th)
gate-source threshold
voltage
I
D
=1mA; V
DS
= V
GS
; T
j
=25°C;
see Figure 10
11.582V
I
D
=1mA; V
DS
= V
GS
; T
j
= 175 °C;
see Figure 10
0.5 - - V
I
D
=1mA; V
DS
= V
GS
; T
j
=-55°C;
see Figure 10
--2.3V
I
DSS
drain leakage current V
DS
=100V; V
GS
=0V; T
j
= 175 °C - - 500 µA
V
DS
=100V; V
GS
=0V; T
j
= 25 °C - 0.05 1 µA
I
GSS
gate leakage current V
DS
=0V; V
GS
=10V; T
j
= 25 °C - 2 100 nA
V
DS
=0V; V
GS
=-10V; T
j
= 25 °C - 2 100 nA
R
DSon
drain-source on-state
resistance
V
GS
=4.5V; I
D
=25A; T
j
=25°C;
see Figure 11; see Figure 12
- 16.4 22.3 mΩ
V
GS
=10V; I
D
=25A; T
j
=25°C;
see Figure 11
; see Figure 12
- 15.6 18.5 mΩ
V
GS
=5V; I
D
=25A; T
j
=175°C;
see Figure 12; see Figure 11
--50mΩ
V
GS
=5V; I
D
=25A; T
j
=25°C;
see Figure 12
; see Figure 11
- 16.2 20 mΩ
Dynamic characteristics
Q
G(tot)
total gate charge I
D
=25A; V
DS
=80V; V
GS
=5V;
T
j
=25°C; see Figure 14; see Figure 15
- 53.4 - nC
Q
GS
gate-source charge - 9.5 - nC
Q
GD
gate-drain charge - 21.2 - nC
C
iss
input capacitance V
GS
=0V; V
DS
=25V; f=1MHz;
T
j
=25°C; see Figure 16
- 4300 5657 pF
C
oss
output capacitance - 340 411 pF
C
rss
reverse transfer
capacitance
- 150 201 pF
t
d(on)
turn-on delay time V
DS
=30V; R
L
=1.2Ω; V
GS
=5V;
R
G(ext)
=10Ω; T
j
=25°C
-45-ns
t
r
rise time - 116 - ns
t
d(off)
turn-off delay time - 173 - ns
t
f
fall time - 77 - ns
L
D
internal drain
inductance
from drain lead 6 mm from package to
centre of die; T
j
=25°C
-4.5-nH
from upper edge of drain mounting base to
centre of die; T
j
=25°C
-2.5-nH
L
S
internal source
inductance
from source lead to source bond pad;
T
j
=25°C
-7.5-nH
