1
LTC1968
1968f
Precision Wide Bandwidth,
RMS-to-DC Converter
High Linearity:
0.02% Linearity Allows Simple System Calibration
Wide Input Bandwidth:
Bandwidth to 1% Additional Gain Error: 500kHz
Bandwidth to 0.1% Additional Gain Error: 150kHz
3dB Bandwidth Independent of Input Voltage
Amplitude
No-Hassle Simplicity:
True RMS-DC Conversion with Only One External
Capacitor
Delta Sigma Conversion Technology
Ultralow Shutdown Current:
0.1µA
Flexible Inputs:
Differential or Single Ended
Rail-to-Rail Common Mode Voltage Range
Up to 1V
PEAK
Differential Voltage
Flexible Output:
Rail-to-Rail Output
Separate Output Reference Pin Allows Level Shifting
Small Size:
Space Saving 8-Pin MSOP Package
True RMS Digital Multimeters and Panel Meters
True RMS AC + DC Measurements
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
The LTC
®
1968 is a true RMS-to-DC converter that uses an
innovative delta-sigma computational technique. The ben-
efits of the LTC1968 proprietary architecture, when com-
pared to conventional log-antilog RMS-to-DC converters,
are higher linearity and accuracy, bandwidth independent
of amplitude and improved temperature behavior.
The LTC1968 operates with single-ended or differential in-
put signals and accurately supports crest factors up to 4.
Common mode input range is rail-to-rail. Differential in-
put range is 1V
PEAK
, and offers unprecedented linearity. The
LTC1968 allows hassle-free system calibration at any in-
put voltage.
The LTC1968 has a rail-to-rail output with a separate out-
put reference pin providing flexible level shifting; it oper-
ates on a single power supply from 4.5V to 5.5V. A low power
shutdown mode reduces supply current to 0.1µA.
The LTC1968 is packaged in the space-saving MSOP pack-
age, which is ideal for portable applications.
Single Supply RMS-to-DC Converter
C
AVE
10µF
V
OUT
+
1968 TA01
4.5V TO 5.5V
OUTPUT
DIFFERENTIAL
INPUT
LTC1968
V
+
0.1µF
OPT. AC
COUPLING
EN GND
OUT RTN
IN1
IN2
TYPICAL APPLICATIO
U
V
IN
(mV AC
RMS
)
0
–1.0
LINEARITY ERROR (V
OUT
mV DC – V
IN
mV AC
RMS
)
–0.8
–0.6
–0.4
–0.2
0
0.2
100 200 300 400
1968 TA01b
500
LTC1968, ∆Σ
60Hz SINEWAVE
CONVENTIONAL
LOG/ANTILOG
Linearity Performance
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected under U.S. Patent Numbers 6,359,576, 6,362,677 and 6,516,291
2
LTC1968
1968f
Supply Voltage
V
+
to GND ............................................................. 6V
Input Currents (Note 2) ..................................... ±10mA
Output Current (Note 3) ..................................... ±10mA
ENABLE Voltage ......................................... 0.3V to 6V
OUT RTN Voltage........................................ 0.3V to V
+
Operating Temperature Range (Note 4)
LTC1968C/LTC1968I ......................... 40°C to 85°C
Specified Temperature Range (Note 5)
LTC1968C/LTC1968I ......................... 40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................ 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1968CMS8
LTC1968IMS8
T
JMAX
= 150°C, θ
JA
= 220°C/ W
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
(Note 1)
MS8 PART MARKING
LTAFG
The denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25°C. V
+
= 5V, V
OUTRTN
= 2.5V, C
AVE
= 10µF, V
IN
= 200mV
RMS
, V
ENABLE
= 0.5V
unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The temperature grade (I or C) is indicated on the shipping container.
1
2
3
4
GND
IN1
IN2
NC
8
7
6
5
ENABLE
V
+
OUT RTN
V
OUT
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Accuracy
G
ERR
Low Frequency Gain Error 50Hz to 20kHz Input (Notes 6, 7) ±0.1 ±0.3 %
±0.4 %
V
OOS
Output Offset Voltage (Notes 6, 7) 0.2 0.75 mV
V
OOS
/T Output Offset Voltage Drift (Note 11) 210µV/°C
LIN
ERR
Linearity Error 50mV to 350mV (Notes 7, 8) ±0.02 ±0.15 %
PSRRG Power Supply Rejection (Note 9) ±0.02 ±0.20 %/V
±0.25 %/V
V
IOS
Input Offset Voltage (Notes 6, 7, 10) 0.4 1.5 mV
V
IOS
/T Input Offset Voltage Drift (Note 11) 210µV/°C
Additional Error vs Crest Factor (CF)
CF = 3 60Hz Fundamental, 200mV
RMS
0.2 mV
CF = 5 60Hz Fundamental, 200mV
RMS
5mV
Input Characteristics
V
IMAX
Maximum Peak Input Swing Accuracy = 1% (Note 14) 1 1.05 V
I
VR
Input Voltage Range 0V
+
V
Z
IN
Input Impedance Average, Differential (Note 12) 1.2 M
Average, Common Mode (Note 12) 100 M
CMRRI Input Common Mode Rejection (Note 13) 50 400 µV/V
V
IMIN
Minimum RMS Input 5mV
PSRRI Power Supply Rejection (Note 9) 250 700 µV/V
3
LTC1968
1968f
The denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25°C. V
+
= 5V, V
OUTRTN
= 2.5V, C
AVE
= 10µF, V
IN
= 200mV
RMS
, V
ENABLE
= 0.5V
unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to GND and
V
+
. If the inputs are driven beyond the rails, the current should be limited
to less than 10mA.
Note 3: The LTC1968 output (V
OUT
) is high impedance and can be
overdriven, either sinking or sourcing current, to the limits stated.
Note 4: The LTC1968C/LTC1968I are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 5: The LTC1968C is guaranteed to meet specified performance from
0°C to 70°C. The LTC1968C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested nor QA
sampled at these temperatures. The LTC1968I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6: High speed automatic testing cannot be performed with
C
AVE
= 10µF. The LTC1968 is 100% tested with C
AVE
= 47nF.
Note 7: The LTC1968 is 100% tested with DC and 10kHz input signals.
Measurements with DC inputs from 50mV to 350mV are used to calculate
the four parameters: G
ERR
, V
OOS
, V
IOS
and linearity error. Correlation tests
have shown that the performance limits can be guaranteed with the
additional testing being performed to guarantee proper operation of all
internal circuitry.
Note 8: The LTC1968 is inherently very linear. Unlike older log/antilog
circuits, its behavior is the same with DC and AC inputs, and DC inputs are
used for high speed testing.
Note 9: The power supply rejections of the LTC1968 are measured with
DC inputs from 50mV to 350mV. The change in accuracy from V
+
= 4.5V
to V
+
= 5.5V is divided by 1V.
Note 10: Previous generation RMS-to-DC converters required nonlinear
input stages as well as a nonlinear core. Some parts specify a “DC reversal
error,” combining the effects of input nonlinearity and input offset voltage.
The LTC1968 behavior is simpler to characterize and the input offset
voltage is the only significant source of “DC reversal error.”
Note 11: Guaranteed by design.
Note 12: The LTC1968 is a switched capacitor device and the input/output
impedance is an average impedance over many clock cycles. The input
impedance will not necessarily lead to an attenuation of the input signal
measured. Refer to the Applications Information section titled “Input
Impedance” for more information.
Note 13: The common mode rejection ratios of the LTC1968 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in V
IOS
measured with the input common mode voltage at 0V and
V
+
, divided by V
+
. The output CMRR is defined as the change in V
OOS
measured with OUT RTN = 0V and OUT RTN = V
+
– 350mV divided by
V
+
– 350mV.
Note 14: The LTC1968 input and output voltage swings are limited by
internal clipping. However, its ∆Σ topology is relatively tolerant of
momentary internal clipping.
Note 15: The LTC1968 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1968 is inherently wideband, but the output
accuracy is degraded by this aliased noise.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Characteristics
OVR Output Voltage Range 0V
+
V
Z
OUT
Output Impedance (Note 12) 10 12.5 16 k
CMRRO Output Common Mode Rejection (Note 13) 50 250 µV/V
V
OMAX
Maximum Differential Output Swing Accuracy = 1%, DC Input (Note 14) 1.0 1.05 V
0.9 V
PSRRO Power Supply Rejection (Note 9) 250 1000 µV/V
Frequency Response
f
1P
1% Additional Gain Error (Note 15) 500 kHz
f
3dB
±3dB Frequency (Note 15) 15 MHz
Power Supplies
V
+
Supply Voltage 4.5 5.5 V
I
S
Supply Current IN1 = 20mV, IN2 = 0V 2.3 2.7 mA
IN1 = 200mV, IN2 = 0V 2.4 mA
Shutdown Characteristics
I
SS
Supply Current V
ENABLE
= 4.5V 0.1 10 µA
I
IH
ENABLE Pin Current High V
ENABLE
= 4.5V –1 –0.1 µA
I
IL
ENABLE Pin Current Low V
ENABLE
= 0.5V –3 –0.5 0.1 µA
V
TH
ENABLE Threshold Voltage 2.1 V
V
HYS
ENABLE Threshold Hysteresis 0.1 V

LTC1968IMS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Prec Wide B&width, RMS-to-DC Conv
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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