IR2132
B-166 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Parameter Value
Symbol Definition Min. Max. Units
V
B1,2,3
High Side Floating Supply Voltage V
S1,2,3
+ 10 V
S1,2,3
+ 20
V
S1,2,3
High Side Floating Offset Voltage Note 1 600
V
HO1,2,3
High Side Floating Output Voltage V
S1,2,3
V
B1,2,3
V
CC
Low Side and Logic Fixed Supply Voltage 10 20
V
SS
Logic Ground -5 5
V
LO1,2,3
Low Side Output Voltage 0 V
CC
V
IN
Logic Input Voltage (
HIN1,2,3, LIN1,2,3 & ITRIP) V
SS
V
SS
+ 5
V
FLT
FAULT
Output Voltage V
SS
V
CC
V
CAO
Operational Amplifier Output Voltage V
SS
5
V
CA-
Operational Amplifier Inverting Input Voltage V
SS
5
T
A
Ambient Temperature -40 125 °C
Parameter Value
Symbol Definition Min. Max. Units
V
B1,2,3
High Side Floating Supply Voltage -0.3 525
V
S1,2,3
High Side Floating Offset Voltage V
B1,2,3
- 25 V
B1,2,3
+ 0.3
V
HO1,2,3
High Side Floating Output Voltage V
S1,2,3
- 0.3 V
B1,2,3
+ 0.3
V
CC
Low Side and Logic Fixed Supply Voltage -0.3 25
V
SS
Logic Ground V
CC
- 25 V
CC
+ 0.3
V
LO1,2,3
Low Side Output Voltage -0.3 V
CC
+ 0.3
V
IN
Logic Input Voltage (
HIN1,2,3, LIN1,2,3 & ITRIP) V
SS
- 0.3 V
CC
+ 0.3
V
FLT
FAULT Output Voltage V
SS
- 0.3 V
CC
+ 0.3
V
CAO
Operational Amplifier Output Voltage V
SS
- 0.3 V
CC
+ 0.3
V
CA-
Operational Amplifier Inverting Input Voltage V
SS
- 0.3 V
CC
+ 0.3
dV
S
/dt Allowable Offset Supply Voltage Transient — 50 V/ns
P
D
Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5
(28 Lead SOIC) — 1.6 W
(44 Lead PLCC) — 2.0
R
θJA
Thermal Resistance, Junction to Ambient (28 Lead DIP) — 83
(28 Lead SOIC) — 78 °C/W
(44 Lead PLCC) — 63
T
J
Junction Temperature — 150
T
S
Storage Temperature -55 150 °C
T
L
Lead Temperature (Soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to V
S0
. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Note 1: Logic operational for V
S
of (V
S0
- 5V) to (V
S0
+ 600V). Logic state held for V
S
of (V
S0
- 5V) to (V
S0
- V
BS
).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to V
S0
. The V
S
offset rating is tested
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
V
V
