NCP81239, NCP81239A
www.onsemi.com
7
Table 3. ELECTRICAL CHARACTERISTICS
(V1 = 12 V, V
out
= 1.0 V , T
A
= +25°C for typical value; 40°C < T
A
< 100°C for min/max values unless noted otherwise)
Parameter UnitsMaxTypMinTest ConditionsSymbol
Interrupt Propagation Delay
PGI Delay for power good in 3.3 ms
PGO Delay for power good out 100 ns
Power Good Threshold
PGTH Power Good in from high 105 %
PGTH Power Good in from low 95 %
PGTHYS PG falling hysteresis 2.5 %
FB Overvoltage Threshold FB_OV 120 %
Overvoltage Propagation Delay VFB_OVDL 1
Cycle
External Current Sense (CS1,CS2)
Positive Current Measurement High
CS10 CSP1CSN1 or CSP2CSN2 =
100 mV
500
mA
Transconductance Gain Factor CSGT Current Sense Transconductance
Vsense = 1 mV to 100 mV
5 mS
Transconductance Deviation CSGE 20 20 %
Current Sense Common Mode
Range
CSCMMR 3 28 V
3dB Small Signal Bandwidth CSBW VSENSE (AC) = 10 mVPP,
RGAIN = 10 kW (Note 4)
30 MHz
Input Sense Voltage Full Scale ISVFS 100 mV
CS Output Voltage Range CSOR VSENSE = 100 mV Rset = 6k 0 3 V
External Current Limit (CLIND)
Current Limit Indicator Output Low
CLINDL
Input current = 500 mA
5.6 100 mV
Current Limit Indicator Output High CLINDH
Input current = 500 mA
4.0 5.0 V
Internal Current Sense
Internal Current Sense Gain for PWM
ICG CSPxCSNx = 100 mV 9.2 9.8 10.5 V/V
Positive Peak Current Limit Trip PPCLT INT_CL = 00 34 39 44 mV
Negative Valley Current Limit Trip NVCLT INT_CL_NEG = 00 31 40 45 mV
Switching MOSFET Drivers
HSG1 HSG2 Pullup Resistance
HSG_PU BSTVSW = 4.5 V 2.8
W
HSG1 HSG2 Pulldown Resistance HSG_PD BSTVSW = 4.5 V 1.2
W
LSG1 LSG2 Pullup Resistance LSG_PU LSG PGND = 2.5 V 3.3
W
LSG1 LSG2 Pulldown Resistance LSG_PD LSG PGND = 2.5 V 0.9
W
HSG Falling to LSG Rising Delay HSLSD 15 ns
LSG Falling to HSG Rising Delay LSHSD 15 ns
4. Ensured by design. Not production tested.
NCP81239, NCP81239A
www.onsemi.com
8
Table 3. ELECTRICAL CHARACTERISTICS
(V1 = 12 V, V
out
= 1.0 V , T
A
= +25°C for typical value; 40°C < T
A
< 100°C for min/max values unless noted otherwise)
Parameter UnitsMaxTypMinTest ConditionsSymbol
CFET
CFET Drive Voltage
CFETDV VCC V
Source/Sink Current CFETSS CFET clamped to 2 V 2
mA
Pull Down Delay CFETD Measured at 10% to 90% of VCC 10 ms
CFET Pull Down Resistance CFETR Measured with 1 mA Pull up Cur-
rent, after 10ms rising edge delay
1.3
kW
Slew Rate/Soft Start
Charge Slew Rate
SLEWP Slew = 00, FB = 0.1 VOUT
Slew = 11, FB = 0.1 VOUT
0.6
4.8
mV/ms
Discharge Slew Rate SLEWN Slew = 00, FB = 0.1 VOUT
Slew = 11, FB = 0.1 VOUT
0.6
4.8
mV/ms
Prebias Level PBLV FB=0.1VOUT 300 mV
Dead Battery/VCONN
Dead Battery Input Voltage Range
VDB 4.5 5 5.25 V
Dead Battery Output Voltage VIO VDB = 5 V, Output Current 32 mA 4 4.7 5 V
Dead Battery Current Limit DB_LIM VDB = 5 V, V1 greater than 2 V 29 57 mA
Enable
EN High Threshold Voltage
ENHT EM_MASK = ENPU = ENPOL = 0 798 820 mV
EN Low Threshold Voltage ENLT 640 665 mV
EN Pull Up Current IEN_UP EN = 0 V 5
mA
EN Pull Down Current IEN_DN EN = VCC 5
mA
I
2
C Interface
Voltage Threshold
I2CVTH 0.95 1 1.05 V
Propagation Delay I2CPD (Note 4) 25 ns
Communication Speed I2CSP 1 MHz
Thermal Shutdown
Thermal Shutdown Threshold
TSD (Note 4) 151 °C
Thermal Shutdown Hysteresis TSDHYS (Note 4) 28 °C
PDRV
PDRV Operating Range
0 28 V
PDRV Leakage Current PDRV_IDS FET OFF, VPDRV = 28 V 180 nA
PDRV Saturation Voltage PDRV_VDS ISNK = 10 mA 0.20 V
Internal ADC
Range
ADCRN (Note 4) 0 2.55 V
LSB Value ADCLSB (Note 4) 20 mV
Error ADCFE (Note 4) 1 LSB
4. Ensured by design. Not production tested.
NCP81239, NCP81239A
www.onsemi.com
9
APPLICATION INFORMATION
Dual Edge Current Mode Control
When dual edge current mode control is used, two voltage
ramps are generated that are 180 degrees out of phase. The
inductor current signal is added to the ramps to incorporate
current mode control. In Figure 4, the COMP signal from the
compensation output interacts with two triangle ramps to
generate gate signals to the switches from S1 to S4. Two
ramp signals cross twice at midpoint within a cycle. When
COMP is above the midpoint, the system will operate at
boost mode with S1 always on and S2 always off, but S3 and
S4 turning on alternatively in an active switching mode.
When COMP is below the midpoint, the system will
operation at buck mode, with S4 always on and S3 always
off, but S1 and S2 turning on alternatively in an active
switching mode. The controller can switch between buck
and boost mode smoothly based on the COMP signal from
peak current regulation.
Figure 4. Transitions for Dual Edge 4 Switch Buck Boost
V1 V2
L1S1
S2
S4
S3
Ramp1+i_sense
comp
Ramp2+i_sense
S1
S2
S3
S4

NCP81239MNTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers I2C CONFIGURABLE 4 SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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