LTC3417A-1
7
3417a1fa
+
+
+
+
+
I
TH
LIMIT
I
TH1
1.5A REGULATOR
1A REGULATOR
V
B
0.752V
0.752V
V
B
0.848V
0.848V
V
IN1
SW1
PGND1
PHASE
SLOPE
COMPENSATION
ANTI-SHOOT-
THROUGH
OSCILLATOR
LOGIC
+
+
V
FB1
+
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+
+
+
+
SYNC/MODE
I
TH2
V
IN2
3417A-1 BD
FREQ
PGND2
SW2
SLOPE
COMPENSATION
ANTI-SHOOT-
THROUGH
I
TH
LIMIT
LOGIC
VOLTAGE
REFERENCE
RUN1
DELAY
RUN2
POR
V
FB2
V
IN2
FUNCTIONAL DIAGRAM
PIN FUNCTIONS
PHASE (Pin 14/Pin 17): Selects 1A regulator switching
phase with respect to 1.5A regulator switching. Set to
V
IN
, the 1.5A regulator and the 1A regulator are in phase.
When PHASE is at 0V, the 1.5A regulator and the 1A
regulator are switching 180 degrees out-of-phase. Do
not fl oat this pin.
SW1 (Pin 15/Pin 18): Switch Node Connection to the
Inductor for the 1.5A Regulator. This pin swings from
V
IN1
to PGND1.
PGND1 (Pin 16/Pin 19): Ground for SW1 N-Channel Driver.
PGND2, GNDD (Pins 1,10,11,20): TSSOP Package Only.
Ground for SW2 N-channel driver and digital ground for
circuit.
Exposed Pad (Pin 17/Pin 21): PGND2, GNDD. Ground for
SW2 N-channel driver and digital ground for circuit. The
Exposed Pad must be soldered to PCB ground.
LTC3417A-1
8
3417a1fa
The LTC3417A-1 uses a constant frequency, current
mode architecture. Both channels share the same clock
frequency. The PHASE pin sets whether the channels are
running in-phase or out of phase. The operating frequency
is determined by connecting the FREQ pin to V
IN
for
1.5MHz operation or by connecting a resistor from FREQ
to ground for a frequency from 0.6MHz to 4MHz. To suit
a variety of applications, the SYNC/MODE pin allows the
user to trade off noise for effi ciency.
The output voltages are set by external dividers returned
to the V
FB1
and V
FB2
pins. An error amplifi er compares the
divided output voltage with a reference voltage of 0.8V and
adjusts the peak inductor current accordingly. Undervoltage
comparators will pull the POR output low when either output
voltage is 8% below its targeted value. The POR output
will go high after 212,992 cycles (when FREQ is high) or
294,912 cycles (when FREQ is tied to ground through an
external resistor), or about 150ms, after both regulators
are above -6% of the target output voltage.
Main Control Loop
For each regulator, during normal operation, the P-chan-
nel MOSFET power switch is turned on at the beginning
of a clock cycle when the V
FB
voltage is below the refer-
ence voltage. The current into the inductor and the load
increases until the current limit is reached. The switch
turns off and energy stored in the inductor fl ows through
the bottom N-channel MOSFET switch into the load until
the next clock cycle.
The peak inductor current is controlled by the voltage
on the I
TH
pin, which is the output of the error amplifi er.
This amplifi er compares the V
FB
pin to the 0.8V reference.
When the load current increases the V
FB
voltage decreases
slightly below the reference. This decrease causes the er-
ror amplifi er to increase the I
TH
voltage until the average
inductor current matches the new load current.
The main control loop is shut down by pulling the RUN pin
to ground. A digital soft-start is enabled after shutdown,
which will slowly ramp the peak inductor current up over
1024 clock cycles.
Low Current Operation
Three modes are available to control the operation of the
LTC3417A-1 at low currents. Each of the three modes
automatically switch from continuous operation to the
selected mode when the load current is low.
To optimize effi ciency, Burst Mode operation can be se-
lected. When the load is relatively light, the LTC3417A-1
automatically switches into Burst Mode operation in which
the PMOS switches operate intermittently based on load
demand. By running cycles periodically, the switching
losses, which are dominated by the gate charge losses
of the power MOSFETs, are minimized. The main control
loop is interrupted when the output voltage reaches the
desired regulated value. The hysteresis voltage comparator
trips when I
TH
is below 0.24V, shutting off the switch and
reducing the power. The output capacitor and the induc-
tor supply the power to the load until I
TH
exceeds 0.31V,
turning on the switch and the main control loop which
starts another cycle.
For lower output voltage ripple at low currents, pulse skip-
ping mode can be used. In this mode, the LTC3417A-1
continues to switch at constant frequency down to very
low currents, where it will begin skipping pulses used to
control the power MOSFETs.
Finally, in forced continuous mode, the inductor current is
constantly cycled creating a fi xed output voltage ripple at all
output current levels. This feature is desirable in telecom-
munications since the noise is a constant frequency and is
thus easy to fi lter out. Another advantage of this mode is
that the regulator is capable of both sourcing current into
a load and sinking some current from the output.
The mode selection for the LTC3417A-1 is set using the
SYNC/MODE pin. The SYNC/MODE pin sets the mode for
both the1A and the 1.5A step-down DC/DC converters.
OPERATION
LTC3417A-1
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3417a1fa
A general LTC3417A-1 application circuit is shown in
Figure 4. External component selection is driven by the
load requirement, and begins with the selection of the
inductors L1 and L2. Once L1 and L2 are chosen, C
IN
,
C
OUT1
and C
OUT2
can be selected.
Operating Frequency
Selection of the operating frequency is a tradeoff between
effi ciency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves effi ciency by
reducing internal gate charge losses but requires larger
inductance values and/or capacitance to maintain low
output ripple voltage.
The operating frequency, f
O
, of the LTC3417A-1 is deter-
mined by pulling the FREQ pin to V
IN
for 1.5MHz opera-
tion or by connecting an external resistor from FREQ to
ground. The value of the resistor sets the ramp current
that is used to charge and discharge an internal timing
capacitor within the oscillator and can be calculated by
using the following equation:
R
T
1.61• 10
11
f
O
Ω
()
16.586kΩ
for 0.6MHz ≤ f
O
≤ 4MHz. Alternatively, use Figure 1 to
select the value for R
T
.
The maximum operating frequency is also constrained
by the minimum on-time and duty cycle. This can be
calculated as:
f
O(MAX)
6.67
V
OUT
V
IN(MAX)
MHz
()
The minimum frequency is limited by leakage and noise
coupling due to the large resistance of R
T
.
Inductor Selection
Although the inductor does not infl uence the operating
frequency, the inductor value has a direct effect on ripple
current. The inductor ripple current, ΔI
L
, decreases with
higher inductance and increases with higher V
IN
or
V
OUT
.
I
L
=
V
OUT
f
O
L
1–
V
OUT
V
IN
Accepting larger values of ΔI
L
allows the use of low induc-
tances, but results in higher output voltage ripple, greater
core losses and lower output current capability.
Figure 1. Frequency vs R
T
OPERATION
FREQUENCY (MHz)
0
R
T
(kΩ)
60
80
100
1.5 2.5 3.53.0 4.0
3417A-1 F01
40
20
0
0.5 1.0 2.0
120
140
160
4.5
APPLICATIONS INFORMATION
Dropout Operation
When the input supply voltage decreases toward the output
voltage, the duty cycle increases to 100%. In this dropout
condition, the PMOS switch is turned on continuously with
the output voltage being equal to the input voltage minus
the voltage drops across the internal P-channel MOSFET
and inductor.
Low Supply Operation
The LTC3417A-1 incorporates an undervoltage lockout
circuit which shuts down the part when the input voltage
drops below about 2.07V to prevent unstable operation.

LTC3417AEFE-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 1.5A & 1A, 4MHz Synchronous Step-Down DC/DC Converter in 3x5 DFN-16 or TSSOP-20E
Lifecycle:
New from this manufacturer.
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