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74HCT03PW-Q100J

P1-P3P4-P6P7-P9P10-P12P13-P15
74HC_HCT03_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 July 2013 9 of 14
NXP Semiconductors
74HC03-Q100; 74HCT03-Q100
Quad 2-input NAND gate
Fig 9. Package outline SOT337-1 (SSOP14)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
0.65 1.25 0.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
8
0
o
o
0.13 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT337-1
99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M
A
X
A
y
1
7
14
8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
A
max.
2
74HC_HCT03_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 July 2013 10 of 14
NXP Semiconductors
74HC03-Q100; 74HCT03-Q100
Quad 2-input NAND gate
Fig 10. Package outline SOT402-1 (TSSOP14)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153
99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
17
14
8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M
A
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
A
max.
1.1
pin 1 index
74HC_HCT03_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 July 2013 11 of 14
NXP Semiconductors
74HC03-Q100; 74HCT03-Q100
Quad 2-input NAND gate
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT03_Q100 v.1 20130704 Product data sheet - -
P1-P3P4-P6P7-P9P10-P12P13-P15

74HCT03PW-Q100J

Mfr. #:
Buy 74HCT03PW-Q100J
Manufacturer:
Nexperia
Description:
Logic Gates Quad 2-input NAND gate
Lifecycle:
New from this manufacturer.
Delivery:
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