AD9042
Rev. B | Page 3 of 24
SPECIFICATIONS
DC SPECIFICATIONS
AV
CC
= DV
CC
= 5 V; V
REF
tied to V
OFFSET
through 50 Ω; T
MIN
= −40°C, T
MAX
= +85°C.
Table 1.
Parameter
1
Temperature Test Level Min Typ Max Unit
RESOLUTION 12 Bits
DC ACCURACY
No Missing Codes Full VI Guaranteed
Offset Error Full VI −10 ±3 +10 mV
Offset Tempco Full V 25 ppm/°C
Gain Error Full VI −6.5 0 +6.5 % FS
Gain Tempco Full V −50 ppm/°C
REFERENCE OUT (V
REF
)
2
25°C V 2.4 V
ANALOG INPUT (AIN)
Input Voltage Range V
REF
± 0.500 V
Input Resistance Full IV 200 250 300 Ω
Input Capacitance 25°C V 5.5 pF
ENCODE INPUT
3
Logic Compatibility
4
TTL/CMOS
Logic 1 Voltage Full VI 2.0 5.0 V
Logic 0 Voltage Full VI 0 0.8 V
Logic 1 Current (V
INH
= 5 V) Full VI 450 625 800 μA
Logic 0 Current (V
INL
= 0 V) Full VI −400 −300 −200 μA
Input Capacitance 25°C V 2 pF
DIGITAL OUTPUTS
Logic Compatibility CMOS
Logic 1 Voltage (I
OH
= 10 μA) 25°C I 3.5 4.2 V
Full IV 3.5 V
Logic 0 Voltage (I
OL
= 10 μA) 25°C I 0.75 0.80 V
Full IV 0.85 V
Output Coding Twos complement
POWER SUPPLY
AV
CC
Supply Voltage Full VI 5.0 V
AV
CC
Current (I) Full V 109 mA
DV
CC
Supply Voltage Full VI 5.0 V
DV
CC
Current (I) Full V 10 mA
I
CC
(Total) Supply Current Full VI 119 147 mA
Power Dissipation Full VI 595 735 mW
Power Supply Rejection Ratio (PSRR) 25°C I −20 ±1 +20 mV/V
Full V ±5 mV/V
1
C1 (Pin 10) tied to GND through a 0.01 μF capacitor.
2
V
REF
is normally tied to V
OFFSET
through 50 Ω. If V
REF
is used to provide dc offset to other circuits, it should first be buffered.
3
ENCODE driven by single-ended source;
ENCODE
bypassed to ground through a 0.01 μF capacitor.
4
ENCODE may also be driven differentially in conjunction with
ENCODE
; see the Encoding the AD9042 section for details.
