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www.pericom.com PS9059A 07/28/12
PI3VDP411LSA
Pin Configuration (48-Pin TQFN)
1
2
3 4
5
6 7
8 9
10 11
12
13
14
15
16
17
18
19
20
21
22
23
24
36
35
34
33
32
31 30
29 28
27 26
25
48
47
46
45
44
43
42
41
40
39
38
37
GND
VDD
IN_D1-
IN_D1+
IN_D2-
IN_D2+
GND
IN_D3-
IN_D3+
IN_D4-
IN_D4+
VDD
GND
VDD
OUT_D1-
OUT_D1+
OUT_D2-
OUT_D2+
GND
OUT_D3-
OUT_D3+
OUT_D4-
OUT_D4+
VDD
GND
VDD
NC
SQSEL
DDC_EN
GND
HPD_SINK
SDA_SINK
SCL_SINK
VDD
OE#
GND
GND
SR1
VDD
SR0
GND
NC
HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
VDD
GND
DDCBSEL
GND
Description
Pericom Semiconductor’s PI3VDP411LSA provides the ability
to use a Dual-mode DisplayPort™ transmitter in HDMI™ mode.
is exibility provides the user a choice of how to connect to
their favorite display. All signal paths accept AC coupled video
signals. e PI3VDP411LSA converts this AC coupled signal into
an HDMI rev 1.3 compliant signal with proper signal swing. is
conversion is automatic and transparent to the user.
Output squelch function is provided for each channel. When out-
put channel is enable (OE#=0) and operating, that TMDS pixel
clock input signal determines whether the output is enabled.
When no TMDS pixel clock is present, TMDS output channel
will be disabled.
e PI3VDP411LSA supports up to 2.5Gbps, which provides 12-
bits of color depth per channel, as indicated in HDMI rev 1.3.
Features
Converts low-swing AC coupled dierential input to
HDMI™ rev 1.3 compliant open-drain current steering Rx
terminated dierential output
HDMI Level shiing operation up to 2.5Gbps per lane
(250MHz pixel clock)
Integrated 50-ohm termination resistors for AC-coupled
dierential inputs.
Provide Output Squelch function to turn o TMDS
common mode output buer when TMDS clock is not
present
Enable/Disable feature to turn o TMDS outputs to enter
low-power state.
Output slew rate control on TMDS outputs to minimize
EMI
Integrated Active / Passive DDC level shiers (3.3V source
to 5V sink)
Transparent operation: no re-timing or conguration
required
Level shier for HPD signal from HDMI/DVI connector
Integrated pull-down on HPD_SINK input guarantees
"input low" when no display is plugged in
3.3V Power supply required
TMDS output enable control
ESD protection on all I/O pins
4kV HBM
±8kV contact ESD protection on the following pins
OUT_Dx±
SDA_SINK, SCL_SINK
HPD_SINK
Packaging (Pb-free & Green available):
48 TQFN, 7mm × 7mm (ZBE)
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shier)
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www.pericom.com PS9059A 07/28/12
PI3VDP411L SA
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shier)
Block Diagram
OE#
IN_D4/3/2/1+
IN_D4/3/2/1-
OUT_D4/3/2/1+
OUT_D4/3/2/1-
50Ω 50Ω
0V
Rx
HPD_SOURCE
100KΩ
HPD_SINK
HPD
SR1/0
DDC_EN (0V to 3.3V)
DDCBSEL
SQSEL
Control
Logic
SDA_SINK
SCL_SINK
SDA_SOURCE
SCL_SOURCE
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www.pericom.com PS9059A 07/28/12
PI3VDP411L SA
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shier)
Pin Description
Pin Name I/O Type Descriptions
1, 5, 12, 18, 24,
27, 31, 36, 37, 43
GND POWER GROUND
2, 11, 15, 21, 26,
33, 40, 46
V
DD
POWER POWER, 3.3V ±10%
3, 4 SR0, SR1 I
Slew Rate Control. Acceptable connections to SRx pin are: resistor to 3.3V or
short to GND. (internal 200KΩ pull-LOW)
6, 35 NC O No Connect
7 HPD_SOURCE O
HPD_SOURCE: 0V to 3.3V (nominal) output signal. HPD_Sink input can be as
high as 5V and then HPD_Source will output no higher than 3.3V.
8 SDA_SOURCE I/O
3.3V DDC Data I/O. Pulled up by external termination to 3.3V.
DDC_EN
DDCBSEL
DDC level shier type
Low X DISABLE DDC level shier
High Low
Passive level shier ENABLE
Connected to SDA_SINK through voltage-
limiting integrated NMOS passgate
High High
Active level shier ENABLE
Connected to SDA_SINK through bi-direc-
tion buer
9 SCL_SOURCE I/O
3.3V DDC Data I/O. Pulled up by external termination to 3.3V.
DDC_EN DDCBSEL DDC level shier type
Low X DISABLE DDC level shier
High Low
Passive level shier ENABLE
Connected to SCL_SINK through voltage-
limiting integrated NMOS passgate
High High
Active level shier ENABLE
Connected to SCL_SINK through bi-direction
buer
10 DDCBSEL I
Active DDC level shier enable pin. (internal 200KΩ pull-LOW)
DDCBSEL DDC path
Low (0V)
Passive DDC level shier
High (3.3V) Active DDC level shier
13 OUT_D4+ O
HDMI 1.3 compliant TMDS output. OUT_D4+ makes a dierential output
signal with OUT_D4-.
14 OUT_D4- O
HDMI 1.3 compliant TMDS output. OUT_D4- makes a dierential output
signal with OUT_D4+
16 OUT_D3+ O
HDMI 1.3 compliant TMDS output. OUT_D3+ makes a dierential output
signal with OUT_D3-.
17 OUT_D3- O
HDMI 1.3 compliant TMDS output. OUT_D3- makes a dierential output

PI3VDP411LSAZBEX

Mfr. #:
Manufacturer:
Diodes Incorporated
Description:
Video ICs Dual Mde DisplayPort TMDS Electricl brdge
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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