IDT70V07S/L
High-Speed 32K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
2
2943 drw 02
12
13
14
15
16
17
18
INDEX
19
20
21
22
98765432168676665
27 28 29 30 31 32 33 34 35 36 37 38 39
V
C
C
VCC
I/O1R
I/O2R
I/O3R
I/O4R
INTL
GND
A
4L
A3L
A2L
A1L
A0L
A3R
A0R
A1R
A2R
I/O2L
A5L
11
10
M/S
23
24
25
26
40 41 42 43
58
57
56
55
54
53
52
51
50
49
48
59
60
47
46
45
44
64 63 62 61
I/O3L
GND
I/O
0R
VCC
A4R
BUSYL
GND
BUSY
R
INTR
A
1
2
R
I
/
O
7
R
N
/
C
G
N
D
O
E
R
R
/
W
R
C
E
R
C
E
L
N
/
C
I
/
O
0
L
I
/
O
1
L
IDT70V07J
J68-1
(4)
68-Pin PLCC
Top View
(5)
I/O4L
I/O5L
I/O6L
I/O7L
I/O5R
I/O6R
A
1
2
L
A
1
1
R
A
1
0
R
A
9
R
A
8
R
A
7
R
A
6
R
A
5
R
A
1
1
L
A
1
0
L
A
9
L
A
8
L
A
7
L
A
6
L
A
1
3
R
A
1
3
L
A
1
4
L
A
1
4
R
R
/
W
L
O
E
L
S
E
M
L
S
E
M
R
10/25/01
Description
The IDT70V07 is a high-speed 32K x 8 Dual-Port Static RAM. The
IDT70V07 is designed to be used as a stand-alone 256K-bit Dual-Port
RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-
or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM
approach in 16-bit or wider memory system applications results in full-
speed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by CE permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using CMOS high-performance technology, these devices
typically operate on only 300mW of power.
The IDT70V07 is packaged in a ceramic 68-pin PGA and PLCC and
a 80-pin thin quad flatpack (TQFP).
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. J68-1 package body is approximately .95 in x .95 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.