74LVC646A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 28 March 2013 10 of 23
NXP Semiconductors
74LVC646A
Octal bus transceiver/register; 3-state
[1] Typical values are measured at T
amb
=25C and V
CC
= 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
(C
L
V
CC
2
f
o
) = sum of the outputs
t
h
hold time An, Bn to CPAB, CPBA; see Figure 7
V
CC
= 1.65 V to 1.95 V 3.0 - - 3.0 - ns
V
CC
= 2.3 V to 2.7 V 2.0 - - 2.0 - ns
V
CC
= 2.7 V 1.0 - - 1.0 - ns
V
CC
= 3.0 V to 3.6 V 1.0 0.3 - 1.0 - ns
f
max
maximum
frequency
see Figure 7
V
CC
= 1.65 V to 1.95 V 100 - - 80 - MHz
V
CC
= 2.3 V to 2.7 V 125 - - 100 - MHz
V
CC
= 2.7 V 150 - - 120 - MHz
V
CC
= 3.0 V to 3.6 V 150 250 - 120 - MHz
t
sk(o)
output skew
time
V
CC
= 3.0 V to 3.6 V
[3]
- - 1.0 - 1.5 ns
C
PD
power
dissipation
capacitance
per input; V
I
=GNDtoV
CC
[4]
V
CC
= 1.65 V to 1.95 V - 8.0 - - - pF
V
CC
= 2.3 V to 2.7 V - 11.7 - - - pF
V
CC
= 3.0 V to 3.6 V - 15.0 - - - pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 11.
Symbol Parameter Conditions T
amb
= 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
74LVC646A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 28 March 2013 11 of 23
NXP Semiconductors
74LVC646A
Octal bus transceiver/register; 3-state
11. Waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Input (An and Bn) to output (Bn and An) propagation delays
001aab044
t
PLH
t
PHL
V
M
V
M
An, Bn
input
Bn, An
output
GND
V
I
V
OH
V
OL
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7. The An, Bn to CPAB, CPBA set-up and hold times, clock CPAB and CPBA pulse width, maximum
frequency, and the CPAB, CPBA to output Bn, An propagation delays
74LVC646A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 28 March 2013 12 of 23
NXP Semiconductors
74LVC646A
Octal bus transceiver/register; 3-state
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 8. The input SAB and SBA to output Bn and An propagation delay times
001aab046
t
PHL
t
PLH
V
M
V
M
SAB, SBA
input
Bn, An
output
GND
V
I
V
OH
V
OL
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 9. The input OE to output An and Bn 3-state enable and disable times
001aab047
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
An, Bn
An, Bn
OE input
V
I
V
OL
V
OH
V
CC
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M

74LVC646ADB,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC TXRX NON-INVERT 3.6V 24SSOP
Lifecycle:
New from this manufacturer.
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