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1-Wire BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances the
DS199x is a slave device. The bus master is typically a microcontroller or PC. For small configurations
the 1-Wire communication signals can be generated under software control using a single port pin. For
multisensor networks, the DS2480B 1-Wire line driver chip or serial port adapters based on this chip
(DS9097U series) are recommended. This simplifies the hardware design and frees the microprocessor
from responding in real-time.
The discussion of this bus system is broken down into three topics: hardware configuration, transaction
sequence, and 1-Wire signaling (signal types and timing). The 1-Wire protocol defines bus transactions in
terms of the bus state during specific time slots that are initiated on the falling edge of sync pulses from
the bus master. For a more detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton
Standards.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open-
drain or three-state outputs. The 1-Wire port of the DS199x is open drain with an internal circuit
equivalent to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves
attached. The 1-Wire bus has a maximum data rate of 16.3kbps and requires a pullup resistor of
approximately 5k. The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be
suspended, the bus must be left in the idle state if the transaction is to resume. If this does not occur and
the bus is left low for more than 120µs, one or more of the devices on the bus may be reset.
Figure 8. HARDWARE CONFIGURATION
Open Drain
Port Pin
RX = RECEIVE
TX = TRANSMIT
100
MOSFET
V
PUP
RX
TX
TX
RX
DATA
R
PU
5 µA
Typ.
BUS MASTER
DS199x 1-Wire PORT
TRANSACTION SEQUENCE
The protocol for accessing the DS199x through the 1-Wire port is as follows:
Initialization
ROM Function Command
Memory Function Command
Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the
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slave(s). The presence pulse lets the bus master know that the DS199x is on the bus and is ready to
operate. For more details, see the 1-Wire Signaling section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the four ROM function commands. All
ROM function commands are 8 bits long. A list of these commands follows (see the flow chart in Figure
9).
Read ROM [33h]
This command allows the bus master to read the DS199x’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command should only be used if there is a single DS199x on the bus. If
more than one slave is present on the bus, a data collision occurs when all slaves try to transmit at the
same time (open drain produces a wired-AND result). The resultant family code and 48-bit serial number
usually result in a mismatch of the CRC.
Match ROM [55h]
The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS199x on a multidrop bus. Only the DS199x that exactly matches the 64-bit ROM sequence
will respond to the following memory function command. All slaves that do not match the 64-bit ROM
sequence wait for a reset pulse. This command can be used with single or multiple devices on the bus.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the
memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus
and, for example, a read command is issued following the Skip ROM command, data collision will occur
on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired-AND
result).
Search ROM [F0h]
When a system is initially brought up, the bus master may not know the number of devices on the 1-Wire
bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process of
elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process is
the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the desired
value of that bit. The bus master performs this simple, 3-step routine on each bit of the ROM. After one
complete pass, the bus master knows the 64-bit ROM code of one device. Additional passes will identify
the ROM codes of the remaining devices. See Chapter 5 of the Book of DS19xx iButton Standards for a
comprehensive discussion of a search ROM, including an actual example.
1-Wire SIGNALING
The DS199x require strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: reset sequence with reset pulse and presence pulse, write 0, write 1, and read data.
The bus master initiates all these signals except presence pulse. The initialization sequence required to
begin any communication with the DS199x is shown in Figure 10. A reset pulse followed by a presence
pulse indicates the DS199x is ready to send or receive data given the correct ROM command and
memory function command. The bus master transmits (Tx) a reset pulse (t
RSTL
, minimum 480µs). The bus
master then releases the line and goes into receive mode (Rx). The 1-Wire bus is pulled to a high state
through the pullup resistor. After detecting the rising edge on the data line, the DS199x waits (t
PDH
, 15µs
to 60µs) and then transmits the presence pulse (t
PDL
, 60µs to 240µs).
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Figure 9. ROM FUNCTIONS FLOW CHART
F0H
Search ROM
Command
?
CCH
Skip ROM
Command
?
DS199x TX Bit 0
DS199x TX Bit 0
Master TX Bit 0
Bit 0
Match ?
DS199x TX Bit 1
DS199x TX Bit 1
Master
TX Bit 1
Bit 1
Match ?
DS199x TX Bit 63
DS199x TX Bit 63
Master TX Bit 63
Bit 63
Match ?
Master TX Memory
Function Command
33H
Read ROM
Command
?
DS199x TX
Serial Number
6 Bytes
DS199x TX
CRC Byte
DS199x TX
Family Code
1 Byte
Match ROM
55H
Command
?
Bit 0
Match ?
Bit 1
Match ?
Bit 63
Match ?
Master TX Bit 1
Master TX Bit 0
N
Y
N
Y
N
N
Y
N
N
N
N
Y
Y
Y
Y
Y
Y
N
Y
N
Master TX ROM
Function Command
Master TX
Reset Pulse
DS199x TX
Presence Pulse
Master TX Bit 63

DS1993L-F5+

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iButtons & Accessories 1Kb/4Kb Memory iButton
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