PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 9 of 14
NXP Semiconductors
PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
11. Soldering
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 4000 8000 10000
PMP5201V SOT666 2 mm pitch, 8 mm tape and reel - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - -
PMP5201G SOT353 4 mm pitch, 8 mm tape and reel -115 - - -135
PMP5201Y SOT363 4 mm pitch, 8 mm tape and reel; T1
[2]
-115 - - -135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125 - - -165
Reflow soldering is the only recommended soldering method.
Fig 14. Reflow soldering footprint SOT666
solder lands
placement area
occupied area
solder paste
sot666_fr
2.75
2.45
2.1
1.6
0.4
(6×)
0.55
(2×)
0.25
(2×)
0.6
(2×)
0.65
(2×)
0.3
(2×)
0.325
(4×)
0.45
(4×)
0.5
(4×)
0.375
(4×)
1.72
1.7
1.075
0.538
Dimensions in mm
