HMC8121 Data Sheet
Rev. B | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Drain Bias Voltage (V
DD1
to V
DD6
) 4.5 V
Gate Bias Voltage (V
GG1
/V
GG2
, V
GG3
to V
GG6
) −3 V to 0 V
Gain Control Voltage (V
CTL1
and V
CTL2
) −6 V to 0 V
Maximum Junction Temperature (to Maintain
1 Million Hours Mean Time to Failure (MTTF))
175°C
Storage Temperature Range −65°C to +150°C
Operating Temperature Range
−55°C to +85°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Table 3. Thermal Resistance
Package Type θ
JC
1
Unit
28-Pad Bare Die [CHIP] 69.5 °C/W
1
Based on ABLEBOND® 84-1LMIT as die attach epoxy with thermal
conductivity of 3.6 W/mK.
ESD CAUTION
Data Sheet HMC8121
Rev. B | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
RFIN
V
GG1
/V
GG2
V
DD1
V
DD2
ENV
DET
V
CTL1
V
CTL2
V
GG3
V
DD3
V
GG4
V
DD4
V
GG5
V
GG6
V
DD5
V
DD6
V
REF
V
DET
123
4
5
6
RFOUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HMC8121
TOP VIEW
(Not to Scale)
13154-002
Figure 2. Pad Configuration
Table 4. Pad Function Descriptions
Pad No. Mnemonic Description
1, 3, 4, 6, 10, 13, 16,
19, 24, 27
GND Ground Connection (See Figure 3).
2 RFIN RF Input. DC couple RFIN and match it to 50 Ω (see Figure 4).
5 RFOUT RF Output. DC couple RFOUT and match it to 50 Ω (see Figure 5).
7 V
DET
Detector Voltage for the Power Detector (See Figure 6). V
DET
is the dc voltage representing the RF
output power rectified by the diode, which is biased through an external resistor. Refer to the typical
application circuit for the required external components (see Figure 38).
8 V
REF
Reference Voltage for the Power Detector (See Figure 6). V
REF
is the dc bias of the diode biased through
an external resistor used for the temperature compensation of V
DET
. Refer to the typical application
circuit for the required external components (see Figure 38).
9, 12, 15, 18, 25, 26 V
DD6
to V
DD1
Drain Bias Voltage for the Variable Gain Amplifier (See Figure 7). For the required external
components, see Figure 38.
11, 14, 17, 20, 28
V
GG6
to V
GG3
,
V
GG1
/V
GG2
Gate Bias Voltage for the Variable Gain Amplifier (See Figure 8). For the required external components,
see Figure 38.
21, 22 V
CTL2
, V
CTL1
Gain Control Voltage for the Variable Gain Amplifier (See Figure 9). For the required external
components, see Figure 38.
23 ENV
DET
Envelope Detector (See Figure 10). For the required external components, see Figure 38.
Die Bottom GND Ground. Die bottom must be connected to the RF/dc ground (see Figure 3).
HMC8121 Data Sheet
Rev. B | Page 6 of 16
INTERFACE SCHEMATICS
GND
13154-003
Figure 3. GND Interface
1.6k
RFIN
13154-004
Figure 4. RFIN Interface
1.6k
RFOUT
13154-005
Figure 5. RFOUT Interface
V
DET
, V
REF
13154-006
Figure 6. V
DET
, V
REF
Interface
Figure 7. V
DD6
to V
DD1
Interface
V
GG6
TO V
GG3
,
V
GG1
/V
GG2
13154-008
Figure 8. V
GG6
to V
GG3
, V
GG1
/V
GG2
Interface
V
CTL2
, V
CTL1
13154-009
Figure 9. V
CTL2
, V
CTL1
Interface
ENV
DET
13154-010
Figure 10. ENV
DET
Interface

HMC8121-SX

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Amplifier E-band 81-86 GHz VGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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