LTC2875
13
2875f
For more information www.linear.com/LTC2875
applicaTions inForMaTion
±25kV ESD Protection
The LTC2875 features exceptionally robust ESD protec-
tion. The
transceiver interface pins (CANH, CANL, SPLIT)
feature
protection with respect to GND to ±25kV HBM
without latchup or damage, during all modes of opera
-
tion or while unpowered. All other pins are protected to
±8kV HBM to make the LTC2875 reliable under severe
environmental conditions.
4Mbps Operation
The LTC2865 features a high speed receiver and transmitter
capable of operating up to 4 Mbps. In order to operate at
this data rate, the transmitter must be set at its maximum
slew rate by pulling the RS pin low to ground with no more
than 4kΩ of resistance, including the output impedance of
the buffer driving the RS input (see RS Pin and Variable
Slew Rate Control below).
Driver
The driver provides full CAN compatibility. When TXD is
low with the chip enabled (RS low), the dominant state is
asserted on the CAN bus lines (subject to the TXD timeout
t
TOTXD
); the CANH driver pulls high and the CANL driver
pulls low. When TXD is high and RS is low, the driver is
in the recessive state; both the CANH and CANL drivers
are in the Hi
-Z state and the bus termination resistor
equalizes the voltage on CANH and CANL. In the recessive
state, the impedance on CANH and CANL is determined
by the receiver input resistance, R
IN
. When RS is high the
LTC2875 is in shutdown; the CANH and CANL drivers are
in the Hi-Z state, and the receiver input resistance R
IN
is
disconnected from the bus by a FET switch.
Transmit Dominant Timeout Function
The LTC2875 includes a 2ms (typical) timer to limit the
time that the transmitter can hold the bus in the dominant
state. If TXD is held low, a dominant state is asserted on
CANH and CANL until the TXD timer times out at t
TOTXD
,
after which the transmitter reverts to the recessive state.
The timer is reset when TXD is brought high. The trans
-
mitter asserts a dominant state upon the next TXD low.
The lowest data rate that can be communicated without
interference from the transmit dominant timeout timer is
2kbps, corresponding to a bit time equal to the minimum
t
TOTXD
value of 0.5ms.
Driver Overvoltage,Overcurrent, and Overtemperature
Protection
The driver outputs are protected from short circuits to any
voltage within the absolute maximum
range of –60
V to
60V. The maximum current in a fault condition is ±100mA.
The driver includes a progressive foldback current limiting
circuit that continuously reduces the driver current limit
with increasing output fault voltage. The fault current is
typically ±10mA for fault voltages of ±60V.
The LTC2875 also features thermal shutdown protection
that disables the driver in case of excessive power dis
-
sipation (see Notes
3
and 4). When the die temperature
exceeds 170°C (typical), the transmitter is forced into the
recessive state. The receiver remains operational.
Power-Up/Down Glitch-Free Outputs
The LTC2875 employs a supply undervoltage detection
circuit to control the activation of the circuitry on-chip.
During power-up, the CANH, CANL, RXD and SPLIT outputs
remain in the high impedance state until the supply reaches
a voltage sufficient to reliably operate the chip. At this
point, the chip activates if RS is low. The receiver output
goes active after a short delay t
ENRX
and reflects the state
at the CAN bus pins, and the SPLIT output goes active at
approximately the same time. The transmitter powers up
in the transmit dominant timeout state regardless of the
state of the TXD pin, and remains in the
recessive state
until
the first high to low transition on TXD after the TXD
enable time t
ENTX
. This assures that the transmitter does
not disturb the bus by glitching to the dominant state
during power-up.
During power down, the reverse occurs; the supply un
-
dervoltage detection
circuit senses low supply voltage and
immediately puts the chip into shutdown. CANH, CANL,
RXD, and SPLIT outputs go to the high impedance state.
The voltage on RXD is pulled high by the 500k pull-up
resistor.
