TJA1028 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 25 July 2012 14 of 24
NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage ranges.
[2] Not applicable to the low slope versions (TJA1028T/xxx/10 and TJA1028TK/xxx/10) of the TJA1028.
[3] . Variable t
bus(rec)(min)
is illustrated in the LIN timing diagram in Figure 8.
[4] Bus load conditions are: C
BUS
= 1 nF and R
BUS
=1k; C
BUS
= 6.8 nF and R
BUS
=660; C
BUS
= 10 nF and R
BUS
= 500 .
[5] For V
BAT
> 18 V, the LIN transmitter might be suppressed. If TXD is HIGH then the LIN transmitter output is recessive.
[6] . Variable t
bus(rec)(max)
is illustrated in the LIN timing diagram in Figure 8.
[7] Not tested in production; guaranteed by design.
4 duty cycle 4 V
th(rec)(min)
= 0.389V
BAT
V
th(dom)(min)
= 0.251V
BAT
t
bit
=96s
V
BAT
= 7.6 V to 18 V
[4][5]
[6]
- - 0.590
V
th(rec)(min)
= 0.378V
BAT
;
V
th(dom)(min)
= 0.242V
BAT
;
t
bit
=96s;
V
BAT
= 6.1 V to 7.6 V
[4][5]
[6]
- - 0.590
Timing characteristics
t
rx_pd
receiver propagation delay rising and falling;
C
RXD
= 20 pF
-- 6s
t
rx_sym
receiver propagation delay symmetry C
RXD
=20pF 2- +2s
t
wake(dom)LIN
LIN dominant wake-up time Sleep mode 30 80 150 s
t
to(dom)TXD
TXD dominant time-out time V
TXD
=0V 6 - 20 ms
t
msel
mode select time 3 - 20 s
t
d(EN-TXD)
delay time from EN to TXD
[7]
0- 1s
t
det(uv)(VCC)
undervoltage detection time on pin V
CC
C
RSTN
= 20 pF 1 - 15 s
Reset output; pin RSTN
t
rst
reset time 2 - 8 ms
Table 7. Dynamic characteristics
…continued
V
BAT
= 5.5 V to 18 V; T
vj
=
40
C to +150
C; R
L(LIN-VBAT)
= 500
; all voltages are defined with respect to ground; positive
currents flow into the IC; typical values are given at V
BAT
= 12 V; unless otherwise specified.
[1]
Symbol Parameter Conditions Min Typ Max Unit
1 3
t
bus recmin
2t
bit
-------------------------------
=
2 4
t
bus recmax
2t
bit
--------------------------------
=
Fig 7. Timing test circuit for LIN transceiver
TJA1028
V
BAT
TXD
R
LIN
C
LIN
RXD
C
RXD
LIN
GND
015aaa198
