ICS854104AG REVISION A JANUARY 30, 2014 4 ©2014 Integrated Device Technology, Inc.
ICS854104 DATASHEET LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
Table 4D. LVDS DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Table 5. AC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at f
MAX
unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential crossing
point of the input to the differential output crossing point.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OD
Differential Output Voltage 250 350 450 mV
V
OD
V
OD
Magnitude Change 50 mV
V
OS
Offset Voltage 1.2 1.3 1.45 V
V
OS
V
OS
Magnitude Change 50 mV
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 700 MHz
t
PD
Propagation Delay; NOTE 1 0.9 1.3 ns
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
155.52MHz, Integration Range:
12kHz – 20MHz)
0.232 ps
tsk(o) Output Skew; NOTE 2, 4 50 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 350 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 180 660 ps
odc Output Duty Cycle 45 55 %
