6
LTC3832/LTC3832-1
sn3832 3832fs
TYPICAL PERFOR A CE CHARACTERISTICS
UW
PV
CC
Supply Current
vs Gate Capacitance
G1 Rise/Fall Time
vs Gate Capacitance Transient Response
UU
U
PI FU CTIO S
G1 (Pin 1/Pin 1): Top Gate Driver Output. Connect this pin
to the gate of the upper N-channel MOSFET, Q1. This
output swings from PGND to PV
CC1
. It remains low if G2
is high or during shutdown mode.
PV
CC1
(Pin 2/Pin 2): Power Supply Input for G1. Connect
this pin to a potential of at least V
IN
+ V
GS(ON)(Q1)
. This
potential can be generated using an external supply or
charge pump.
PGND (Pin 3/Pin 3): Power Ground. Both drivers return to
this pin. Connect this pin to a low impedance ground in
close proximity to the source of Q2. Refer to the Layout
Consideration section for more details on PCB layout
techniques. The LTC3832-1 has PGND and GND tied
together internally at Pin 3.
GND (Pin 4/Pin 3): Signal Ground. All low power internal
circuitry returns to this pin. To minimize regulation errors
due to ground currents, connect GND to PGND right at the
LTC3832.
SENSE
–
, FB, SENSE
+
(Pins 5, 6, 7/Pin 4): These three
pins connect to the internal resistor divider and input of the
error amplifier. To use the internal divider to set the output
voltage to 2.5V, connect SENSE
+
to the positive terminal
of the output capacitor and SENSE
–
to the negative termi-
nal. FB should be left floating. To use an external resistor
divider to set the output voltage, float SENSE
+
and SENSE
–
and connect the external resistor divider to FB. The internal
resistor divider is not included in the LTC3832-1.
SHDN (Pin 8/NA): Shutdown. A TTL compatible low level
at SHDN for longer than 100µs puts the LTC3832 into
shutdown mode. In shutdown, G1 and G2 go low, all
internal circuits are disabled and the quiescent current
drops to 10µA max. A TTL compatible high level at SHDN
allows the part to operate normally. This pin also doubles
as an external clock input to synchronize the internal
oscillator with an external clock. The shutdown function is
disabled in the LTC3832-1.
SS (Pin 9/Pin 5): Soft-Start. Connect this pin to an external
capacitor, C
SS
, to implement a soft-start function. If the
LTC3832 goes into current limit, C
SS
is discharged to
reduce the duty cycle. C
SS
must be selected such that
during power-up, the current through Q1 will not exceed
the current limit level.
COMP (Pin 10/Pin 6): External Compensation. This pin
internally connects to the output of the error amplifier and
input of the PWM comparator. Use a RC + C network at this
pin to compensate the feedback loop to provide optimum
transient response.
(LTC3832/LTC3832-1)
V
OUT
50mV/DIV
I
LOAD
2AV/DIV
50µs/DIV
3832 G21
GATE CAPACITANCE AT G1 AND G2 (nF)
0
G1 RISE/FALL TIME (ns)
120
160
200
8
3832 G20
80
40
100
140
180
60
20
0
21
43
67 9
5
10
T
A
= 25°C
t
f
AT PV
CC1,2
= 12V
t
r
AT PV
CC1,2
= 12V
t
r
AT PV
CC1,2
= 5V
t
f
AT PV
CC1,2
= 5V
GATE CAPACITANCE AT G1 AND G2 (nF)
0
PV
CC
SUPPLY CURRENT (mA)
80
70
60
50
40
30
20
10
0
8
3832 G19
246 107135 9
T
A
= 25°C
PV
CC1,2
= 12V
PV
CC1,2
= 5V
