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STL105NS3LLH7
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
DocID024624 Rev 4
7/16
STL105NS3LLH7
Electrical
characteristic
s
Figure 8. Cap
acitance
variations
Figure 9. Normalized on-resis
tance
vs
temperat
ure
C
1500
1000
500
0
0
20
V
DS
(V)
(pF)
10
Ciss
Coss
Crss
2000
2500
AM17925v1
R
DS(on)
1.4
1
0.6
-75
0
T
J
(°C)
(norm)
-50
75
25
50
100
0.8
1.2
1.6
-25
125
I
D
=13.5A
AM17926v1
Test circuits
STL105NS3LLH7
8/16
DocID024624 Rev 4
3
T
est circuit
s
Figure 10. Switching times test circuit for
resis
tive lo
ad
Figure 1
1. Gate charge test circuit
Figure 12. T
est circuit for inductive load
switching and diode recovery times
Figure 13. Unclamped inductive load test circuit
Figure 14. Unclamped inductive waveform
Figure 15.
Switching time waveform
AM01468v1
V
GS
P
W
V
D
R
G
R
L
D.
U.T.
2200
μ
F
3.3
μ
F
V
DD
AM01469v1
V
DD
47k
Ω
1k
Ω
47k
Ω
2.7k
Ω
1k
Ω
12V
V
i
=20V=V
GMAX
2200
μ
F
P
W
I
G
=CONST
100
Ω
100nF
D.
U.T.
V
G
AM01470v1
A
D
D.U.
T.
S
B
G
25
Ω
A
A
B
B
R
G
G
F
AST
DIODE
D
S
L=100
μ
H
μ
F
3.3
1000
μ
F
V
DD
AM01471v1
V
i
P
w
V
D
I
D
D.U.
T.
L
2200
μ
F
3.3
μ
F
V
DD
AM01472v1
V
(BR)DSS
V
DD
V
DD
V
D
I
DM
I
D
AM01473v1
V
DS
t
on
td
on
td
off
t
off
t
f
t
r
90%
10%
10%
0
0
90%
90%
10%
V
GS
DocID024624 Rev 4
9/16
STL105NS3LLH7
Package information
4 Package
information
In order to meet envir
onment
al requireme
nts, ST of
fers these devices in dif
ferent gra
des of
ECOP
ACK
®
packa
ges, dependin
g on their leve
l of enviro
nmental
compliance.
ECOP
ACK
®
specifications, gr
ade definitions and pr
oduct status
are available at:
www
.st.com
.
ECOP
ACK
®
is an ST
tradem
ark.
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
STL105NS3LLH7
Mfr. #:
Buy STL105NS3LLH7
Manufacturer:
STMicroelectronics
Description:
MOSFET N-CH 30V 27A PWRFLAT56
Lifecycle:
New from this manufacturer.
Delivery:
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STL105NS3LLH7