5©2015 Integrated Device Technology, Inc. Revision C, December 8, 2015
8545 Datasheet
Table 4C. LVDS DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
AC Electrical Characteristics
Table 5. AC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
All parameters measured at ƒ 650MHz unless noted otherwise.
NOTE 1: Measured from V
DD
/2 of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
DD
/2 of the input to the differential output crossing point.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OD
Differential Output Voltage 200 280 360 mV
V
OD
V
OD
Magnitude Change 40 mV
V
OS
Offset Voltage 1.125 1.25 1.375 V
V
OS
V
OS
Magnitude Change 5 25 mV
I
Oz
High Impedance Leakage -10 ±1 +10 µA
I
OFF
Power Off Leakage -20 ±1 +20 µA
I
OSD
Differential Output Short Circuit Current -3.5 -5 mA
I
OS
Output Short Circuit Current -3.5 -5 mA
V
OH
Output Voltage High 1.34 1.6 V
V
OL
Output Voltage Low 0.9 1.06 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 650 MHz
t
PD
Propagation Delay; NOTE 1 ƒ 650MHz 1.4 3.6 ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
156.25MHz, Integration
Range: 12kHz – 20MHz
0.13 ps
tsk(o) Output Skew; NOTE 2, 4 40 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 500 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% @ 50MHz 200 400 700 ps
odc Output Duty Cycle
ƒ 266MHz 45 55 %
ƒ > 266MHz 40 60 %
