DocID14273 Rev 5 19/30
L9758 Electrical characteristics
29
4.11 IGN and PSU_EN inputs
T
amb
= -40 °C to 125 °C, V
BAT
= V
BAT_SW
= 5.5 to 26.5 V, unless otherwise specified.
Table 17. RSTL reset signals
Symbol Parameter Test condition Min. Typ. Max. Unit
I
RSTL_H
Reset “high”
leakage current
V
DDL
= 5.15 V -3.0 - - μA
V
RSTL_L
Reset “low” output
voltage
V
DDL
=5.0V Ire=5mA
V
DDL
=1.0V Ire=1mA
--
0.4
0.4
V
V
FTH_RSTL
Reset threshold
decreasing
ΔV
DDL
/Δt < 0, V
PROG3
=Low 2.375 -
V
DDL
0.05
V
V
RTH_RSTL
Reset threshold
increasing
ΔV
DDL
/Δt < 0, V
PROG3
=Low 2.375 -
V
DDL
0.02
V
V
FTH_RSTL_O
Reset threshold
decreasing
ΔV
DDL
/Δt < 0, V
PROG3
=Open 3.13 -
V
DDL
0.05
V
V
RTH_RSTL_O
Reset threshold
increasing
ΔV
DDL
/Δt < 0, V
PROG3
=Open 3.13 -
V
DDL
0.02
V
V
HY_RSTL
Reset threshold
hysteresis
-40--mV
t
ACT_RSTL
Reset activation out
of tolerance duration
-15-25μs
t
DEL_RSTL
Reset delay 1nF < C
EXT
< 10nF; 4.7kΩ < R
ext
< 47kΩ 1 - 10 ms
t
ERR_RSTL
Reset delay
accuracy
R
ext
±1% -15 - +15 %
Table 18. IGN and PSU_EN inputs
Symbol Parameter Test condition Min. Typ. Max. Unit
V
TH_IGN
IGN input threshold threshold @ IGN pin 2 - 3.6 V
V
HYS_IGN
IGN input threshold
hysteresis
- 0.2 - 1.4 V
R
PD_IGN
IGN pull-down resistor - 300 - 1100 kΩ
V
TH_PSUEN
PSU_EN input threshold - 0.9 -
0.55*
V
STBY
V
V
HYS_PSUEN
PSU_EN input threshold
hysteresis
- 0.2 - 0.8 V
R
PD_PSUEN
PSU pull-down resistor - 50 - 230 kΩ
V
OL_IGNON
IGN_ON “low” output
voltage
Iol=1mA 0.4 V
R
IGN_EXT
IGN external input
resistance
10 50 kΩ
Electrical characteristics L9758
20/30 DocID14273 Rev 5
4.12 STBY_OK signal
T
amb
= -40°C to 125°C, V
BAT
= V
BAT_SW
= 5.5 to 26.5V, unless otherwise specified.
Table 19. STBY_OK signal
Symbol Parameter Conditions Min Typ Max Units
T
h_stbyok
VstanbyOK threshold ΔV
STBY
/Δt <0 -8,5 - -3,5 %
T
stbydly
STBY_OK filter time - 15 - 25 μs
T
stbyok
STBY_OK delay accuracy - 10 - 60 μs
V
ol_stbyok
STBY_OK low output
voltage
V
STBY
= 1 V I
stbyok
=1 mA - - 0.4 V
DocID14273 Rev 5 21/30
L9758 Functional description
29
5 Functional description
5.1 General function
The L9758 is equipped with 9 linear voltage regulators. A buck boost switch mode power
supply as pre regulator for the 7 main regulators is used to reduce the power consumption in
the system.
Two standby regulators can be used to bias the system on off-mode. These two regulators
are equipped with an independent bandgap voltage reference. The current consumption of
these two linear regulators is specified to be less than 120 μA in OFF state. If these standby
functions are not used the current consumption on the battery can be reduced by not
connecting the VBAT. Under this condition the device enters immediately in the run mode,
the pin PSU_REN looses his function. The quiescent current on the VBAT_SW can be
reduced to maximum 10 μA with 12 V battery voltage in off mode. The main regulators can
be activated with the IGN input. With an external resistor higher than 10 kΩ in series to the
IGN pin a battery compliant signal can be used. In the functional block diagram (see
Figure 2) a resistor value of 51 kΩ is used together with a 100 nF capacitor for noise
robustness on IGN.
5.2 Switching pre-regulator
The switching pre-regulator is a buck or a buck-boost current control mode regulator. The
optional boost operation for low battery conditions can be selected connecting external logic
level low side NCH FET and an external diode in series to the inductor.
The external parts required to complete the switching regulator are an inductor, recirculation
diode and input and output filtering capacitor. The compensation network is inside the
device.
With a constant switching frequency of 350 kHz, the pre-regulator controls the output
voltage (the voltage at the VB and FDBK pins) to the limits stated in the electrical
characteristics table varying the duty cycle. The 350 kHz are related to R
EXT
= 10 kΩ (see
Section 5.8).
At low battery voltages, in buck configuration, the pre-regulator runs with the duty cycle up
to 100%. In buck-boost configuration normally it runs at 350 kHz but for a limited range of
input voltage it could enter in pulse skipping mode to control the output voltage.
A soft start function is implemented reducing the current limitation during the power-up
phase.
5.3 VDD5, VDDL and VCORE linear regulators
The VDD5 output is a fully integrated low drop out regulator. The V
DDL
and V
CORE
supplies
will be implemented via an external N-channel pass MOS, with the control being internal to
the IC. If the pass MOS is not used, two low current (max 30 mA) regulators are available
connecting directly VDDL_FDBK to VDDL_DRV and VCORE_FDBK to VCORE_DRV with a
resistor divider.The output of the pre-regulator is used as the source of these supplies.
V
DD5
is a fixed 5 V nominal output, while V
DDL
and V
CORE
are programmable.

L9758

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Power Management Specialized - PMIC Multiple output Volt Reg Engine Ctrl
Lifecycle:
New from this manufacturer.
Delivery:
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