ASAHI KASEI [AK4114]
MS0098-E-04 2004/03
- 28 -
INT1 pin ="H"
No
Yes
Initialize
PD pin ="L" to "H"
Read 06H
Read 06H
and
Detect QSUB= “1”
No
(Read Q-buffer)
New data
is valid
INT1 pin ="L"
QCRC = “0”
Yes
Yes
New data
is invalid
No
Figure 28. Error Handling Sequence Example (for Q/CINT)
ASAHI KASEI [AK4114]
MS0098-E-04 2004/03
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Audio Serial Interface Format
The DIF0, DIF1 and DIF2 pins can select eight serial data formats as shown in Table 14. In all formats the serial data is
MSB-first, 2's compliment format. The SDTO is clocked out on the falling edge of BICK and the DAUX is latched on
the rising edge of BICK. BICK outputs 64fs clock in Mode 0-5. Mode 6-7 are Slave Modes, and BICK is available up to
128fs at fs=48kHz. In the format equal or less than 20bit (Mode0-2), LSBs in sub-frame are truncated. In Mode 3-7, the
last 4LSBs are auxiliary data (see Figure 29).
When the Parity Error, Biphase Error or Frame Length Error occurs in a sub-frame, AK4114 continues to output the last
normal sub-frame data from SDTO repeatedly until the error is removed. When the Unlock Error occurs, AK4114 output
“0” from SDTO. In case of using DAUX pin, the data is transformed and output from SDTO. DAUX pin is used in Clock
Operation Mode 1, 3 and unlock state of Mode 2.
The input data format to DAUX should be left justified except in Mode5 and 7(Table 14). In Mode5 or 7, both the input
data format of DAUX and output data format of SDTO are I
2
S. Mode6 and 7 are Slave Mode that is corresponding to the
Master Mode of Mode4 and 5. In salve Mode, LRCK and BICK should be fed with synchronizing to MCKO1/2.
0 34 781112 27 28 29 30 31
preamble Aux.
LSB MSB
VUCP
sub-frame of IEC958
023
AK4112 Audio Data (MSB First)
LSBMSB
Figure 29. Bit configuration
LRCK BICK
Mode DIF2 DIF1 DIF0 DAUX SDTO
I/O I/O
0 0 0 0 24bit, Left justified 16bit, Right justified H/L O 64fs O
1 0 0 1 24bit, Left justified 18bit, Right justified H/L O 64fs O
2 0 1 0 24bit, Left justified 20bit, Right justified H/L O 64fs O
3 0 1 1 24bit, Left justified 24bit, Right justified H/L O 64fs O
4 1 0 0 24bit, Left justified 24bit, Left justified H/L O 64fs O
5 1 0 1 24bit, I
2
S 24bit, I
2
S L/H O 64fs O
6 1 1 0 24bit, Left justified 24bit, Left justified H/L I 64-128fs I Default
7 1 1 1 24bit, I
2
S 24bit, I
2
S L/H I 64-128fs I
Table 14. Audio data format
ASAHI KASEI [AK4114]
MS0098-E-04 2004/03
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LRCK(0)
BIC
K
(
0:64fs
)
SDTO
(
0
)
012 31 0 1
15:MSB, 0:LSB
Lch Data Rch Data
15 1716 1531 0 1 2 1716
0101 15 141415
Figure 30. Mode 0 Timing
LRCK
(
0
)
BICK
(
0:64fs
)
SDTO
(
0
)
012 31 0 1
23:MSB, 0:LSB
Lch Data Rch Data
91110 931 0 1 2 1110
0101
12
21 202021
12
2223 2223
Figure 31. Mode 3 Timing
LRCK
BICK
(
64fs
)
SDTO
(
0
)
012 31 0 1
23:MSB, 0:LSB
Lch Data Rch Data
21 2322 2131 0 1 2 2322
23 222
24
1 001
24
212223 32 23 22
Figure 32. Mode 4, 6 Timing Mode4 : LRCK, BICK : Output
Mode6 : LRCK, BICK : Input
LRCK
BICK
(
64fs
)
SDTO
(
0
)
012 31 0 1
23:MSB, 0:LSB
Lch Data Rch Data
2322 2131 0 1 2 2322
23 22
24
1 0
24
32 23
25
2 01212223
25
Figure 33. Mode 5, 7 Timing Mode5 : LRCK, BICK : Output
Mode7 : LRCK, BICK : Input

AK4114VQ

Mfr. #:
Manufacturer:
Description:
IC AUDIO DECODER 24BIT 48LQFP
Lifecycle:
New from this manufacturer.
Delivery:
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