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DS8007A-EAG+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P41
DS8007A
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 7
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR MULTIPLEXED
PARALLEL BUS
(V
DD
= 3.3V, V
DDA
= 3.3V, T
A
= +25°C, unless otherwise noted.) (Figure 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
XTAL1 Cycle Time t
CY(XTAL1)
50 ns
ALE Pulse Width t
W(ALE)
20 ns
Address Valid to ALE Low t
AVLL
10 ns
ALE Low to RD or WR Low t
(AL-RWL)
10 ns
Register URR 2 x t
CY(XTAL1)
RD Pulse Width t
W(RD)
Other registers 10
ns
RD Low to Data Read Valid t
(RL-DV)
50 ns
WR/RD High to ALE High t
(RWH-AH)
10 ns
WR Pulse Width t
W(WR)
10 ns
Data Write Valid to WR Low t
(DV-WL)
10 ns
ALE
CS
D7–D0
RD
WR
ADDRESS ADDRESS
DATA
(READ)
DATA
(WRITE)
t
W(ALE)
t
AVLL
t
(AL-RWL)
t
W(RD)
t
(RL-DV)
t
(RWH-AH)
t
(DV-WL)
t
(RWH-AH)
t
W(WR)
Figure 1. Multiplexed Parallel Bus Timing
DS8007A
Multiprotocol Dual Smart Card Interface
8 _______________________________________________________________________________________
t
4
DATA IN
ADDRESS
WRITE
RELEASE
WITH CS
WRITE
RELEASE
WITH EN
t
6
t
7
t
1
t
8
DATA OUT
ADDRESS
CS
READ
WRITE
WR (EN)
RD (R/W)
AD3–AD0
D7–D0
CS
WR (EN)
CS
WR (EN)
RD (R/W)
AD3–AD0
D7–D0
t
2
t
3
t
5
Figure 2. Nonmultiplexed Parallel Bus Timing (Read and Write)
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR NONMULTIPLEXED
PARALLEL BUS (READ AND WRITE)
(V
DD
= 3.3V, V
DDA
= 3.3V, T
A
= +25°C, unless otherwise noted.) (See Figure 2.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RD High to CS Low t
1
10 ns
Access Time CS Low to Data Out Valid t
2
50 ns
CS High to Data Out High Impedance t
3
10 ns
Data Valid to End of Write t
4
10 ns
Data Hold Time t
5
10 ns
RD Low to CS or WR Low t
6
10 ns
Address Stable to CS or WR High t
7
10 ns
Address to CS Low t
8
10 ns
DS8007A
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 9
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR CONSECUTIVE
READ/WRITE TO URR/UTR/TOC
(V
DD
= 3.3V, V
DDA
= 3.3V, T
A
= +25°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SEE FIGURE 3
RD Pulse Width t
W(RD)
10 ns
RD Low to Bit CRED = 1 t
RD(URR)
t
W(RD)
+
2t
CY(CLK)
t
W(RD)
+
3t
CY(CLK)
ns
Set Time Bit FE t
SB(FE)
10.5 ETU
Set Time Bit RBF t
SB(RBF)
10.5 ETU
SEE FIGURE 4
WR/CS Pulse Width t
W(WR)
(Note 4) 10 ns
WR/CS Low to I/Ox Low t
WR(UTR)
t
W(WR)
+
2t
CY(CLK)
t
W(WR)
+
3t
CY(CLK)
ns
SEE FIGURE 5
WR/CS Pulse Width t
W(WR)
10 ns
WR/CS High to Bit CRED = 1 t
WR(TOC)
(Notes 4 and 5) 1 / PSC 2 / PSC ETU
t
SB(RBF)
t
W(RD)
t
SB(FE)
I/Ox
RBF BIT
FE BIT
INT
RD
CRED BIT
t
RD(URR)
Figure 3. Timing Between Two Read Operations in Register URR
Note 4: Depends on the leading edge of WR or CS (whichever is deasserted first). Reference this specification to the rising edge
of CS/WR instead of the falling edge.
Note 5: PSC is the programmed prescaler value (31 or 32).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P41

DS8007A-EAG+T

Mfr. #:
Buy DS8007A-EAG+T
Manufacturer:
Maxim Integrated
Description:
Interface - Specialized Multiprotocol Dual Smart Card Interface
Lifecycle:
New from this manufacturer.
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