Si550
4 Rev. 1.1
Table 5. CLK± Output Phase Jitter
Parameter Symbol Test Condition Min Typ Max Units
Phase Jitter (RMS)
1,2,3
for F
OUT
> 500 MHz
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.26
0.26
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.27
0.26
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.32
0.26
ps
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.40
0.27
ps
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.49
0.28
ps
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.87
0.33
ps
Notes:
1. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
V
that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (K
V
), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
4. Max jitter for LVPECL output with V
C
=1.65V, V
DD
=3.3V, 155.52 MHz.
5. Max offset frequencies: 80 MHz for F
OUT
> 250 MHz, 20 MHz for 50 MHz < F
OUT
<250 MHz,
2 MHz for 10 MHz <
F
OUT
<50 MHz.
Si550
Rev. 1.1 5
Phase Jitter (RMS)
1,2,3,4,5
for F
OUT
of 125 to 500 MHz
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.37
0.33
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.37
0.33
0.4
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.43
0.34
ps
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.50
0.34
ps
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
0.59
0.35
ps
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
1.00
0.39
ps
Table 5. CLK± Output Phase Jitter (Continued)
Parameter Symbol Test Condition Min Typ Max Units
Notes:
1. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
V
that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (K
V
), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
4. Max jitter for LVPECL output with V
C
=1.65V, V
DD
=3.3V, 155.52 MHz.
5. Max offset frequencies: 80 MHz for F
OUT
> 250 MHz, 20 MHz for 50 MHz < F
OUT
<250 MHz,
2 MHz for 10 MHz < F
OUT
<50 MHz.
Si550
6 Rev. 1.1
Phase Jitter (RMS)
1,2,5
for F
OUT
10 to 160 MHz
CMOS Output Only
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
0.63
0.62
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
0.63
0.62
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
0.67
0.66
ps
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
0.74
0.72
ps
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
0.83
0.8
ps
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 20 MHz
1.26
1.2
ps
Table 6. CLK± Output Period Jitter
Parameter Symbol Test Condition Min Typ Max Units
Period Jitter* J
PER
RMS 2 ps
Peak-to-Peak 14
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
Table 5. CLK± Output Phase Jitter (Continued)
Parameter Symbol Test Condition Min Typ Max Units
Notes:
1. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
V
that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (K
V
), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
4. Max jitter for LVPECL output with V
C
=1.65V, V
DD
=3.3V, 155.52 MHz.
5. Max offset frequencies: 80 MHz for F
OUT
> 250 MHz, 20 MHz for 50 MHz < F
OUT
<250 MHz,
2 MHz for 10 MHz < F
OUT
<50 MHz.

550GF27M0000DGR

Mfr. #:
Manufacturer:
Silicon Labs
Description:
VCXO Oscillators Differential/single-ended single frequency VCXO; 10-1417 MHz
Lifecycle:
New from this manufacturer.
Delivery:
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