1. Overview
page 11
62fo6002,52.luJ15.0.veR
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)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
P9
2
/TB2
IN
/AN
32
P9
1
/TB1
IN
/AN
31
CNV
SS
P1
7
/INT
5
/IDU
P1
6
/INT
4
/IDW
P1
5
/INT
3
/AD
TRG
/IDV
P107/AN7/KI3
P7
0
/TxD
2
/TA
0OUT
/SDA
2
/CTS
1
/RTS
1
/CTS
0
/CLKS
1
X
OUT
V
SS
X
IN
P8
5
/NMI/SD
V
CC
P6
7
/TxD
1
P6
6
/RxD
1
P6
5
/CLK
1
RESET
P71/RxD2/TA0IN/SCL2/CLK1
P72/CLK2/TA1OUT/V/RxD1
P73/CTS2/RTS2/TA1IN/V/TxD1
P74/TA2OUT/W
P75/TA2IN/W
P76/TA3OUT
P77/TA3IN
P80/TA4OUT/U
P8
1/TA4IN/U
P8
2/INT0
P83/INT1
P6
4
/CTS
1
/RTS
1
/CTS
0
/CLKS
1
P6
3
/TxD
0
P6
2
/RxD
0
P6
1
/CLK
0
P6
0
/CTS
0
/RTS
0
P9
0
/TB0
IN
/AN
30
/CLK
OUT
P8
7
/X
CIN
P8
6
/X
COUT
P106/AN6/KI2
P105/AN5/KI1
P104/AN4/KI0
P103/AN3
P102/AN2
P101/AN1
AVss
P100/AN0
VREF
AVcc
P93/AN24
P84/INT2/ZP
Note. Set PACR2 to PACR0 bit in the PACR register
to "100
2
" before you input and output it after
resetting to each pin. When the PACR register
isn't set up, the input and output function of
some of the
p
ins are disabled.
Package: PLQP0048KB-A (48P6Q)
1.5 Pin Assignments
Figures 1.6 and 1.7 show the Pin Assignments (top view).
Figure 1.6 Pin Assignment for 48-Pin Package (Top View)
1. Overview
page 12
62fo6002,52.luJ15.0.veR
1500-1700B30JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Table 1.11 Pin Characteristics for 48-Pin Package
niP
.oN
lortnoC
niP
troP
tpurretnI
niP
niPremiTniPTRAUniPgolanA
19P
2
BT
NI2
3NA
2
29P
1
BT
NI1
3NA
1
39P
0
BT
NI0
KLC
TUO
3NA
0
4ssVNC
5X
NIC
8P
7
6X
TUOC
8P
6
7TESER
8X
TUO
9ssV
01X
NI
11ccV
218P
5
IMNDS
318P
4
TNI
2
PZ
418P
3
TNI
1
518P
2
TNI
0
618P
1
AT
NI4
U/
718P
0
AT
TUO4
U/
817P
7
AT
NI3
917P
6
AT
TUO3
027P
5
AT
NI2
W/
127P
4
AT
TUO2
W/
227P
3
AT
NI1
V/STC
2
STR/
2
T/
X
D
1
327P
2
AT
TUO1
V/KLC
2
R/
X
D
1
427P
1
AT
NI0
R
X
D
2
LCS/
2
KLC/
1
527P
0
AT
TUO0
T
X
D
2
ADS/
2
STR/
1
STC/
1
STC/
0
SKLC/
1
626P
7
T
X
D
1
726P
6
R
X
D
1
826P
5
KLC
1
926P
4
STR
1
STC/
1
STC/
0
SKLC/
1
036P
3
T
X
D
0
136P
2
R
X
D
0
236P
1
KLC
0
336P
0
STR
0
STC/
0
431P
7
TNI
5
UDI
531P
6
TNI
4
WDI
631P
5
TNI
3
VDIDA
GRT
7301P
7
IK
3
NA
7
8301P
6
IK
2
NA
6
9301P
5
IK
1
NA
5
0401P
4
IK
0
NA
4
1401P
3
NA
3
2401P
2
NA
2
3401P
1
NA
1
44ssVA
5401P
0
NA
0
64V
FER
74ccVA
849P
3
2NA
4
1. Overview
page 13
62fo6002,52.luJ15.0.veR
1500-1700B30JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
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7
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9
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19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
RESET
AVSS
P100/AN0
VREF
XIN
XOUT
VSS
VCC
P86/XCOUT
P65/CLK1
P83/INT1
P82/INT0
P81/TA4IN/U
P8
0/TA4OUT/U
P7
7/TA3IN
P76/TA3OUT
P75/TA2IN/W
P7
4/TA2OUT/W
P64/CTS1/RTS1/CTS0/CLKS1
P70/TxD2/SDA2/TA0OUT/CTS1/RTS1/CTS0/CLKS1
P71/RxD2/SCL2/TA0IN/CLK1
P72/CLK2/TA1OUT/V/RxD1
P73/CTS2/RTS2/TA1IN/V/TxD1
AVCC
P91/TB1IN/AN31
P90/TB0IN/AN30/CLKout
CNVSS
P87/XCIN
P66/RxD1
P67/TxD1
P85/NMI/SD
P84/INT2/ZP
P17/INT5/IDU
P16/INT4/IDW
P15/INT3/ADTRG/IDV
P107/AN7/KI3
P106/AN6/KI2
P105/AN5/KI1
P104/AN4/KI0
P103/AN3
P102/AN2
P101/AN1
Note. Set PACR2 to PACR0 bit in the PACR register
to "001
2
" before you input and output it after
resetting to each pin. When the PACR register
isn't set up, the input and output function of
some of the
p
ins are disabled.
Package: PRSP0042GA-B (42P2R)
Figure 1.7 Pin Assignment for 42-Pin Package (Top View)

M30260F8AGP#U3A

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU MCU 3/5V 64K I-temp Pb-free 48-LQFP
Lifecycle:
New from this manufacturer.
Delivery:
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