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P89LPC921FDH,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P46
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 19 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.12 I/O ports
The P89LPC920/921/922/9221 has three I/O ports: Port 0, Port 1, and Port 3. Ports 0
and 1 are 8-bit ports, and Port 3 is a 2-bit port. The exact number of I/O pins available
depend upon the clock and reset options chosen, as shown in Tabl e 6 .
[1] Required for operation above 12 MHz.
8.12.1 Port configurations
All but three I/O port pins on the P89LPC920/921/922/9221 may be configured by
software to one of four types on a bit-by-bit basis. These are: quasi-bidirectional
(standard 80C51 port outputs), push-pull, open drain, and input-only. Two
configuration registers for each port select the output type for each port pin.
P1.5 (RST) can only be an input and cannot be configured.
Fig 6. Interrupt sources, interrupt enables, and power-down wake-up sources.
002aaa418
IE0
EX0
IE1
EX1
BOF
EBO
KBIF
EKBI
INTERRUPT
TO CPU
WAKE-UP
(IF IN POWER-DOWN)
EWDRT
CMF2
CMF1
EC
EA (IE0.7)
TF0
ET0
TF1
ET1
TI & RI/RI
ES/ESR
TI
EST
SI
EI2C
RTCF
ERTC
(RTCCON.1)
WDOVF
Table 6: Number of I/O pins available
Clock source Reset option Number of I/O pins
(20-pin package)
On-chip oscillator or
watchdog oscillator
No external reset (except during power-up) 18
External
RST pin supported
[1]
17
External clock input No external reset (except during power-up) 17
External
RST pin supported
[1]
16
Low/medium/high
speed oscillator
(external crystal or
resonator)
No external reset (except during power-up) 16
External
RST pin supported
[1]
15
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 20 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be configured to be either input-only or
open-drain.
8.12.2 Quasi-bidirectional output configuration
Quasi-bidirectional output type can be used as both an input and output without the
need to reconfigure the port. This is possible because when the port outputs a logic
HIGH, it is weakly driven, allowing an external device to pull the pin LOW. When the
pin is driven LOW, it is driven strongly and able to sink a fairly large current. These
features are somewhat similar to an open-drain output except that there are three
pull-up transistors in the quasi-bidirectional output that serve different purposes.
The P89LPC920/921/922/9221 is a 3 V device, but the pins are 5 V-tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current
flowing from the pin to V
DD
, causing extra power consumption. Therefore, applying
5 V in quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
8.12.3 Open-drain output configuration
The open-drain output configuration turns off all pull-ups and only drives the
pull-down transistor of the port driver when the port latch contains a logic ‘0’. To be
used as a logic output, a port configured in this manner must have an external
pull-up, typically a resistor tied to V
DD
.
An open-drain port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
8.12.4 Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt-triggered input
that also has a glitch suppression circuit.
8.12.5 Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous
strong pull-up when the port latch contains a logic ‘1’. The push-pull mode may be
used when more source current is needed from a port output. A push-pull port pin
has a Schmitt-triggered input that also has a glitch suppression circuit. The
P89LPC9221 device has high source current on eight pins in push-pull mode. See
Table 8 “DC electrical characteristics”.
8.12.6 Port 0 analog functions
The P89LPC920/921/922/9221 incorporates two Analog Comparators. In order to
give the best analog function performance and to minimize power consumption, pins
that are being used for analog functions must have the digital outputs and digital
inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only (high
impedance) mode as described in Section 8.12.4.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register,
bits 1:5. On any reset, PT0AD1:5 defaults to ‘0’s to enable digital functions.
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 21 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.12.7 Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different
from the LPC76x series of devices.
• After power-up, all I/O pins except P1.5, may be configured by software.
• Pin P1.5 is input only. Pins P1.2 and P1.3 and are configurable for either input-only
or open-drain.
Every output on the P89LPC920/921/922/9221 has been designed to sink typical
LED drive current. However, there is a maximum total output current for all ports
which must not be exceeded. Please refer to Table 8 “DC electrical characteristics” for
detailed specifications.
All ports pins that can function as an output have slew rate controlled outputs to limit
noise generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
8.13 Power monitoring functions
The P89LPC920/921/922/9221 incorporates power monitoring functions designed to
prevent incorrect operation during initial power-up and power loss or reduction during
operation. This is accomplished with two hardware functions: Power-on Detect and
Brownout detect.
8.13.1 Brownout detection
The Brownout detect function determines if the power supply voltage drops below a
certain level. The default operation is for a Brownout detection to cause a processor
reset, however it may alternatively be configured to generate an interrupt.
Brownout detection may be enabled or disabled in software.
If Brownout detection is enabled, the brownout condition occurs when V
DD
falls below
the brownout trip voltage, V
BO
(see Table 8 “DC electrical characteristics”), and is
negated when V
DD
rises above V
BO
. If the P89LPC920/921/922/9221 device is to
operate with a power supply that can be below 2.7 V, BOE should be left in the
unprogrammed state so that the device can operate at 2.4 V, otherwise continuous
brownout reset may prevent the device from operating.
For correct activation of Brownout detect, the V
DD
rise and fall times must be
observed. Please see Table 8 “DC electrical characteristics” for specifications.
8.13.2 Power-on detection
The Power-on Detect has a function similar to the Brownout detect, but is designed to
work as power comes up initially, before the power supply voltage reaches a level
where Brownout detect can work. The POF flag in the RSTSRC register is set to
indicate an initial power-up condition. The POF flag will remain set until cleared by
software.
8.14 Power reduction modes
The P89LPC920/921/922/9221 supports three different power reduction modes.
These modes are Idle mode, Power-down mode, and total Power-down mode.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P46

P89LPC921FDH,518

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Buy P89LPC921FDH,518
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU 8B MCU 80C51 2/4/8KB 3V FL 256B RAM
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New from this manufacturer.
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