Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 28 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 9. I
2
C-bus serial interface block diagram.
INTERNAL BUS
002aaa421
ADDRESS REGISTER
COMPARATOR
SHIFT REGISTER
8
I2ADR
ACK
BIT COUNTER /
ARBITRATION &
SYNC LOGIC
8
I2DAT
TIMING
&
CONTROL
LOGIC
SERIAL CLOCK
GENERATOR
CCLK
INTERRUPT
INPUT
FILTER
OUTPUT
STAGE
INPUT
FILTER
OUTPUT
STAGE
P1.3
P1.3/SDA
P1.2/SCL
P1.2
TIMER 1
OVERFLOW
CONTROL REGISTERS &
SCL DUTY CYCLE REGISTERS
I2CON
I2SCLH
I2SCLL
8
STATUS
DECODER
STATUS BUS
STATUS REGISTER
8
I2STAT
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 29 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.20 Analog comparators
Two analog comparators are provided on the P89LPC920/921/922/9221. Input and
output options allow use of the comparators in a number of different configurations.
Comparator operation is such that the output is a logical one (which may be read in a
register and/or routed to a pin) when the positive input (one of two selectable pins) is
greater than the negative input (selectable from a pin or an internal reference
voltage). Otherwise the output is a zero. Each comparator may be configured to
cause an interrupt when the output value changes.
The overall connections to both comparators are shown in Figure 10. The
comparators function to V
DD
= 2.4 V.
When each comparator is first enabled, the comparator output and interrupt flag are
not guaranteed to be stable for 10 microseconds. The corresponding comparator
interrupt should not be enabled during that time, and the comparator interrupt flag
must be cleared before the interrupt is enabled in order to prevent an immediate
interrupt service.
When a comparator is disabled the comparator’s output, COx, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFx.
This will cause an interrupt if the comparator interrupt is enabled. The user should
therefore disable the comparator interrupt prior to disabling the comparator.
Additionally, the user should clear the comparator flag, CMFx, after disabling the
comparator.
8.20.1 Internal reference voltage
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as V
REF
, is 1.23 V ±10%.
Fig 10. Comparator input and output connections.
Comparator 1
CP1
CN1
(P0.4) CIN1A
(P0.3) CIN1B
(P0.5) CMPREF
V
REF
OE1
Change Detect
CO1
CMF1
Interrupt
002aaa422
CMP1 (P0.6)
EC
Change Detect
CMF2
Comparator 2
OE2
CO2
CMP2 (P0.0)
CP2
CN2
(P0.2) CIN2A
(P0.1) CIN2B
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 08 — 15 December 2004 30 of 46
9397 750 14469
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.20.2 Comparator interrupt
Each comparator has an interrupt flag contained in its configuration register. This flag
is set whenever the comparator output changes state. The flag may be polled by
software or may be used to generate an interrupt. The two comparators use one
common interrupt vector. If both comparators enable interrupts, after entering the
interrupt service routine, the user needs to read the flags to determine which
comparator caused the interrupt.
8.20.3 Comparators and power reduction modes
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down
mode. If a comparator interrupt is enabled (except in Total Power-down mode), a
change of the comparator output state will generate an interrupt and wake up the
processor. If the comparator output to a pin is enabled, the pin should be configured
in the push-pull mode in order to obtain fast switching times while in Power-down
mode. The reason is that with the oscillator stopped, the temporary strong pull-up that
normally occurs during switching on a quasi-bidirectional port pin does not take
place.
Comparators consume power in Power-down and Idle modes, as well as in the
normal operating mode. This fact should be taken into account when system power
consumption is an issue. To minimize power consumption, the user can disable the
comparators via PCONA.5, or put the device in Total Power-down mode.
8.21 Keypad interrupt (KBI)
The Keypad Interrupt function is intended primarily to allow a single interrupt to be
generated when Port 0 is equal to or not equal to a certain pattern. This function can
be used for bus address recognition or keypad recognition. The user can configure
the port via SFRs for different tasks.
The Keypad Interrupt Mask Register (KBMASK) is used to define which input pins
connected to Port 0 can trigger the interrupt. The Keypad Pattern Register (KBPATN)
is used to define a pattern that is compared to the value of Port 0. The Keypad
Interrupt Flag (KBIF) in the Keypad Interrupt Control Register (KBCON) is set when
the condition is matched while the Keypad Interrupt function is active. An interrupt will
be generated if enabled. The PATN_SEL bit in the Keypad Interrupt Control Register
(KBCON) is used to define equal or not-equal for the comparison.
In order to use the Keypad Interrupt as an original KBI function like in 87LPC76x
series, the user needs to set KBPATN = 0FFH and PATN_SEL = 1 (not equal), then
any key connected to Port 0 which is enabled by the KBMASK register will cause the
hardware to set KBIF and generate an interrupt if it has been enabled. The interrupt
may be used to wake up the CPU from Idle or Power-down modes. This feature is
particularly useful in handheld, battery-powered systems that need to carefully
manage power consumption yet also need to be convenient to use.
In order to set the flag and cause an interrupt, the pattern on Port 0 must be held
longer than 6 CCLKs.

P89LPC921FDH,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU 8B MCU 80C51 2/4/8KB 3V FL 256B RAM
Lifecycle:
New from this manufacturer.
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