8344I Data Sheet
©2015 Integrated Device Technology, Inc December 14, 20154
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 3.135 3.3 3.465 V
I
DD
Quiescent Power Supply Current 95 mA
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Quiescent Power Supply Current 95 mA
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, V
O
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance, θ
JA
47.9°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, V
DD
= V
DDO
= 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 2.375 2.5 2.625 V
V
DDO
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Quiescent Power Supply Current 95 mA
8344I Data Sheet
©2015 Integrated Device Technology, Inc December 14, 20155
TABLE 4D. LVCMOS DC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
CLK_SEL,
OE1, OE2, OE3
2 3.8 V
V
IL
Input Low Voltage
CLK_SEL,
OE1, OE2, OE3
-0.3 0.8 V
I
IH
Input High Current
OE1, OE2, OE3 V
DD
= V
IN
= 3.465V 5 µA
CLK_SEL V
DD
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current
OE1, OE2, OE3 V
DD
= 3.465, V
IN
= 0V -150 µA
CLK_SEL V
DD
= 3.465, V
IN
= 0V -5 µA
V
OH
Output High Voltage
V
DD
= V
DDO
= 3.135V
I
OH
= -36mA
2.6 V
V
OL
Output Low Voltage
V
DD
= V
DDO
= 3.135V
I
OL
= 36mA
0.6 V
TABLE 4E. LVCMOS DC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
CLK_SEL,
OE1, OE2, OE3
2 3.8 V
V
IL
Input Low Voltage
CLK_SEL,
OE1, OE2, OE3
-0.3 0.8 V
I
IH
Input High Current
OE1, OE2, OE3 V
DD
= V
IN
= 3.465V 5 µA
CLK_SEL V
DD
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current
OE1, OE2, OE3 V
DD
= 3.465, V
IN
= 0V -150 µA
CLK_SEL V
DD
= 3.465, V
IN
= 0 -5 µA
V
OH
Output High Voltage
V
DD
= 3.135V,
V
DDO
= 2.375V
I
OH
= -27mA
2V
V
OL
Output Low Voltage
V
DD
= 3.135V,
V
DDO
= 2.365V
I
OL
= 27mA
0.63 V
TABLE 4F. LVCMOS DC CHARACTERISTICS, V
DD
= V
DDO
= 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
CLK_SEL,
OE1, OE2, OE3
2 2.9 V
V
IL
Input Low Voltage
CLK_SEL,
OE1, OE2, OE3
-0.3 0.8 V
I
IH
Input High Current
OE1, OE2, OE3 V
DD
= V
IN
= 2.625V 5 µA
CLK_SEL V
DD
= V
IN
= 2.625V 150 µA
I
IL
Input Low Current
OE1, OE2, OE3 V
DD
= 2.625, V
IN
= 0V -150 µA
CLK_SEL V
DD
= 2.625, V
IN
= 0V -5 µA
V
OH
Output High Voltage
V
DD
= VDDO = 2.375V
I
OH
= -27mA
2V
V
OL
Output Low Voltage
V
DD
= VDDO = 2.375V
I
OL
= 27mA
0.6 V
8344I Data Sheet
©2015 Integrated Device Technology, Inc December 14, 20156
TABLE 4G. DIFFERENTIAL DC CHARACTERISTICS, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
nCLK0, nCLK1 5 µA
CLK0, CLK1 150 µA
I
IL
Input Low Current
nCLK0, nCLK1 -150 µA
CLK0, CLK1 -5 µA
V
PP
Peak-to-Peak Input Voltage 0.15 1.3 V
V
CMR
Common Mode Input Voltage; NOTE 1, 2 GND + 0.5 V
DD
- 0.85 V
NOTE 1: For single ended applications, the maximum input voltage for CLK, nCLK is V
DD
+ 0.3V.
NOTE 2: Common mode voltage is defi ned as
V
IH
.
TABLE 5A. AC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Maximum Output Frequency 100 MHz
tp
LH
Propagation Delay,
Low to High; NOTE 1
f 100MHz
2.6 4.3 ns
tp
HL
Propagation Delay,
High to Low; NOTE 1
f 100MHz 2.4 4.3 ns
tsk(b) Bank Skew; NOTE 2, 6 150 ps
tsk(o) Output Skew; NOTE 3, 6 275 ps
tsk(pp) Part-to-Part Skew; NOTE 4, 6 600 ps
t
R
Output Rise Time; NOTE 5 30% to 70% 300 1700 ps
t
F
Output Fall Time; NOTE 5 30% to 70% 300 1400 ps
odc Output Duty Cycle 40% 60% %
t
EN
Output Enable Time; NOTE 5 f = 66.7MHz 5 ns
t
DIS
Output Disable TIme; NOTE 5 f = 66.7MHz 4 ns
All parameters measured at 100MHz unless noted otherwise.
NOTE 1: Measured from the diffferential input crossing point to V
DDO
/2.
NOTE 2: Defi ned as skew within a bank of outputs at the same voltage and with equal load conditions.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
DDO
/2.
NOTE 4: Defi ned as skew between outputs on different devices operating at the same supply voltage and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at V
DDO
/2.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
NOTE 6: This parameter is defi ned in accordance with JEDEC Standard 65.

8344BYILFT

Mfr. #:
Manufacturer:
Description:
Clock Drivers & Distribution 24 LVCMOS OUT BUFFER
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