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LTC3722EGN-2#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
LTC3722-1/LTC3722-2
16
372212fb
For more information www.linear.com/LTC3722
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC3722-1/LTC3722-2. Figure 5 shows
various bias supply configurations.
Programming Undervoltage Lockout
The LTC3722-1/LTC3722-2 provides undervoltage lockout
(UVLO) control for the input DC voltage feed to the power
converter in addition to the V
CC
UVLO function described
in the preceding section. Input DC feed UVLO is provided
with the UVLO pin. A comparator on UVLO compares a
divided down input DC feed voltage to the 5V precision
reference. When the 5V level is exceeded on UVLO, the
SS pin is released and output switching commences. At
the same time a 10µA current is enabled which flows out
of UVLO into the voltage divider connected to UVLO. The
amount of DC feed hysteresis provided by this current is:
10µA • R
TOP
, see Figure 6. The system UVLO threshold is:
5V • [(R
TOP
+ R
BOTTOM
)/R
BOTTOM
]. If the voltage applied
to UVLO is present and greater than 5V prior to the V
CC
UVLO circuitry activation, then the internal UVLO logic
will prevent output switching until the following three
conditions are met: (1) V
CC
UVLO is enabled, (2) V
REF
is
in regulation and (3) UVLO pin is greater than 5V.
UVLO can also be used to enable and disable the power
converter. An open drain transistor connected to UVLO,
as shown in Figure 6, provides this capability.
Off-Line Bias Supply Generation
If a regulated bias supply is not available to provide V
CC
voltage to the LTC3722-1/LTC3722-2 and supporting
circuitry, one must be generated. Since the power require-
ment is small, approximately 1W, and the regulation is not
critical, a simple open-loop method is usually the easiest
and lowest cost approach. One method that works well
is to add a winding to the main power transformer, and
post regulate the resultant square wave with an L-C filter
(see Figure 7a). The advantage of this approach is that it
maintains decent regulation as the supply voltage varies,
and it does not require full safety isolation from the input
winding of the transformer. Some manufacturers include a
primary winding for this purpose in their standard product
offerings as well. A different approach is to add a winding
to the output inductor and peak detect and filter the square
wave signal (see Figure 7b). The polarity of this winding
OPERATION
Figure 5. Bias Configurations
372212 F05
12V ±10%
1.5k
V
CC
V
IN
V
CC
C
HOLD
1N5226
3V
0.1µF
0.1µF
V
BIAS
< V
UVLO
R
START
1N914
+
Figure 7a. Auxiliary Winding Bias Supply
372212 F07a
+
V
CC
V
IN
C
HOLD
0.1µF
R
START
2k
15V*
*OPTIONAL
372212 F07b
V
CC
V
OUT
V
IN
C
HOLD
R
START
+
0.1µF
L
OUT
ISO BARRIER
ON OFF
R
BOTTOM
R
TOP
UVLO
372212 F06
Figure 7b. Output Inductor Bias Supply
Figure 6. System UVLO Setup
LTC3722-1/LTC3722-2
17
372212fb
For more information www.linear.com/LTC3722
is designed so that the positive voltage square wave is
produced while the output inductor is freewheeling. An
advantage of this technique over the previous is that it
does not require a separate filter inductor and since the
voltage is derived from the well regulated output voltage, it
is also well controlled. One disadvantage is that this wind-
ing will require the same safety isolation that is required
for the main transformer. Another disadvantage is that a
much larger V
CC
filter capacitor is needed, since it does
not generate a voltage as the output is first starting up,
or during short-circuit conditions.
Programming the LTC3722-1/LTC3722-2 Oscillator
The high accuracy LTC3722-1/LTC3722-2 oscillator circuit
provides flexibility to program the switching frequency,
slope compensation, and synchronization with minimal
external components. The LTC3722-1/LTC3722-2 oscillator
circuitry produces a 2.2V peak-to-peak amplitude ramp
waveform on C
T
and a narrow pulse on SYNC that can be
used to synchronize other PWM chips. Typical maximum
duty cycles of 98.5% are obtained at 300kHz and 96% at
1MHz. A compensating slope current is derived from the
oscillator ramp waveform and sourced out of CS.
The desired amount of slope compensation is selected
with single external resistor. A capacitor to GND on C
T
programs the switching frequency. The C
T
ramp discharge
current is internally set to a high value (>10mA). The dedi-
cated SYNC I/O pin easily achieves synchronization. The
LTC3722-1/LTC3722-2 can be set up to either synchronize
other PWM chips or be synchronized by another chip or
external clock source. The 1.8V SYNC threshold allows the
LTC3722-1/LTC3722-2 to be synchronized directly from
all standard 3V and 5V logic families.
Design Procedure:
1. Choose C
T
for the desired oscillator frequency. The
switching frequency selected must be consistent with
the power magnetics and output power level. In general,
increasing the switching frequency will decrease the
maximum achievable output power, due to limitations
of maximum duty cycle imposed by transformer core
reset and ZVS. Remember that the tranformer fre-
quency is one-half that of the oscillator.
C
T
=
(13.4k • f
OSC
)
Example: Desired f
OSC
= 330kHz
C
T
= 1/(13.4k • f
OSC
) = 226pF, choose closest standard
value of 220pF. A 5% or better tolerance multilayer NPO
or X7R ceramic capacitor is recommended for best
performance.
2. The LTC3722-1/LTC3722-2 can either synchronize other
PWMs, or be synchronized to an external frequency
source or PWM chip (see Figure 8 for details).
OPERATION
Figure 8a. SYNC Output (Master Mode) Figure 8b. SYNC Input from an External Source
LTC3722
LTC3722
LTC3722
C
T
C
T
C
T
C
T
C
T
C
T
SYNC
SYNC
SYNC
5.1k
5.1k
5.1k
1k
1k
•
•
•
UP TO
5 SLAVES
SLAVES
MASTER
C
T
OF SLAVE(S) IS
1.25 C
T
OF MASTER.
372212 F08a
LTC3722
C
T
C
T
SYNC
5.1k
1k
372212 F08b
EXTERNAL
FREQUENCY
SOURCE
AMPLITUDE > 1.8V
100ns < PW < 0.4/ƒ
LTC3722-1/LTC3722-2
18
372212fb
For more information www.linear.com/LTC3722
3. Slope compensation is required for most peak current
mode controllers in order to prevent subharmonic
oscillation of the current control loop. In general, if the
system duty cycle exceeds 50% in a fixed frequency,
continuous current mode converter, an unstable con-
dition exists within the current control loop. Any
perturbation in the current signal is amplified by the
PWM modulator resulting in an unstable condition.
Some common manifestations of this include alternate
pulse nonuniformity and pulse width jitter. Fortunately,
this can be addressed by adding a corrective slope to
the current sense signal or by subtracting the same
slope from the current command signal (error am-
plifier output). In theory, the current doubler output
configuration does not require slope compensation
since the output inductor duty cycles only approach
50%. However, transient conditions can momentarily
cause higher duty cycles and therefore, the possibility
for unstable operation.
The exact amount of required slope compensation is
easily programmed by the LTC3722-1/LTC3722-2 with
the addition of a single external resistor (see Figure 9).
The LTC3722-1/LTC3722-2 generates a current that
is proportional to the instantaneous voltage on C
T
,
(33µA/V(C
T
)). Thus, at the peak of C
T
, this current is
approximately 74µA and is output from the CS pin. A
resistor connected between CS and the external current
sense resistor sums in the required amount of slope
compensation. The value of this resistor is dependent
on several factors including minimum V
IN
, V
OUT
, switch-
ing frequency, current sense resistor value and output
inductor value. An illustrative example with the design
equation for current doubler secondary follows.
Example:
V
IN
= 36V to 72V
V
OUT
= 3.3V
I
OUT
= 40A
L = 2.2µH
Transformer turns ratio (N) =
V
IN(MIN)
•
DC
MAX
(2 • V
OUT
)
= 5
R
CS
= 0.05Ω
f
SW
= 300kHz, i.e., transformer f =
f
SW
2
= 150kHz
R
SLOPE
= V
O
•
R
CS
(2 • L • f
SW
• 74µA • N)
= 3.3V •
0.05
2 • 2.2µH • 300k • 74µA • 5
R
SLOPE
= 338Ω, choose the next higher standard value
to account for tolerances in I
SLOPE
, R
CS
, N and L.
OPERATION
Figure 9. Slope Compensation Circuitry
BRIDGE
CURRENT
CURRENT SENSE
WAVEFORM
V(C
T
)
33k
I =
CS
C
T
33k
ADDED
SLOPE
R
SLOPE
R
CS
372212 F09
LTC3722
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LTC3722EGN-2#PBF

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Buy LTC3722EGN-2#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Sync 2x Mode PhModulated Full Bridge Cnt
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