ICS9DB803D
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2
IDT®
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2 13
ICS9DB803D REV N 071013
General SMBus Serial Interface Information
How to Write
Controller (host) sends a start bit
Controller (host) sends the write address
IDT clock will acknowledge
Controller (host) sends the beginning byte location = N
IDT clock will acknowledge
Controller (host) sends the byte count = X
IDT clock will acknowledge
Controller (host) starts sending Byte N through Byte
N+X-1
IDT clock will acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read
Controller (host) will send a start bit
Controller (host) sends the write address
IDT clock will acknowledge
Controller (host) sends the beginning byte location = N
IDT clock will acknowledge
Controller (host) will send a separate start bit
Controller (host) sends the read address
IDT clock will acknowledge
IDT clock will send the data byte count = X
IDT clock sends Byte N+X-1
IDT clock sends Byte 0 through Byte X (if X
(H)
was
written to Byte 8)
Controller (host) will need to acknowledge each byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
Index Block Write Operation
Controller (Host) IDT (Slave/Receiver)
TstarT bit
Slave Address
WR WRite
ACK
Beginning Byte = N
ACK
Data Byte Count = X
ACK
Beginning Byte N
X Byte
ACK
O
O O
O O
O
Byte N + X - 1
ACK
PstoP bit
Read Address Write Address
DD
(H)
DC
(H)
Index Block Read Operation
Controller (Host) IDT (Slave/Receiver)
TstarT bit
Slave Address
WR WRite
ACK
Beginning Byte = N
ACK
RT Repeat starT
Slave Address
RD ReaD
ACK
Data Byte Count=X
ACK
X Byte
Beginning Byte N
ACK
O
O O
O O
O
Byte N + X - 1
N Not acknowledge
PstoP bit
ICS9DB803D
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2
IDT®
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2 14
ICS9DB803D REV N 071013
SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD)
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
PD_Mode PD# drive mode RW driven Hi-Z 0
Bit 6
STOP_Mode DIF_Stop# drive mode RW driven Hi-Z 0
Bit 5
Reserved Reserved RW X
Bit 4
Reserved Reserved RW X
Bit 3
Reserved Reserved RW X
Bit 2
PLL_BW# Select PLL BW RW High BW Low BW 1
Bit 1
BYPASS# BYPASS#/PLL RW fan-out ZDB 1
Bit 0
SRC_DIV# SRC Divide by 2 Select RW x/2 1x 1
SMBus Table: Output Control Register
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
DIF_7 Output Enable RW Disable Enable 1
Bit 6
DIF_6 Output Enable RW Disable Enable 1
Bit 5
DIF_5 Output Enable RW Disable Enable 1
Bit 4
DIF_4 Output Enable RW Disable Enable 1
Bit 3
DIF_3 Output Enable RW Disable Enable 1
Bit 2
DIF_2 Output Enable RW Disable Enable 1
Bit 1
DIF_1 Output Enable RW Disable Enable 1
Bit 0
DIF_0 Output Enable RW Disable Enable 1
SMBus Table: OE Pin Control Register Control Register
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
DIF_7 DIF_7 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 6
DIF_6 DIF_6 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 5
DIF_5 DIF_5 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 4
DIF_4 DIF_4 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 3
DIF_3 DIF_3 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 2
DIF_2 DIF_2 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 1
DIF_1 DIF_1 Stoppable with DIFSTOP RW Free-run Stoppable 0
Bit 0
DIF_0 DIF_0 Stoppable with DIFSTOP RW Free-run Stoppable 0
SMBus Table: Reserved Register
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
RW X
Bit 6
RW X
Bit 5
RW X
Bit 4
RW X
Bit 3
RW X
Bit 2
RW X
Bit 1
RW X
Bit 0
RW X
Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
B
y
te 2
Reserved Reserved
B
y
te 3
Reserved
-
-
- Reserved
-
B
y
te 0
-
-
B
y
te 1
-
-
ICS9DB803D
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2
IDT®
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2 15
ICS9DB803D REV N 071013
SMBus Table: Vendor & Revision ID Register
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
RID3 R - - X
Bit 6
RID2 R - - X
Bit 5
RID1 R - - X
Bit 4
RID0 R - - X
Bit 3
VID3 R - - 0
Bit 2
VID2 R - - 0
Bit 1
VID1 R - - 0
Bit 0
VID0 R - - 1
SMBus Table: DEVICE ID
Pin # Name Control Function T
yp
e0 1PWD
Bit 7
RW 0
Bit 6
RW X
Bit 5
RW X
Bit 4
RW 0
Bit 3
RW 0
Bit 2
RW 0
Bit 1
RW 1
Bit 0
RW 1
SMBus Table: Byte Count Register
Pin # Name
Control
Function
Type 0 1 PWD
Bit 7
BC7 RW - - 0
Bit 6
BC6 RW - - 0
Bit 5
BC5 RW - - 0
Bit 4
BC4 RW - - 0
Bit 3
BC3 RW - - 0
Bit 2
BC2 RW - - 1
Bit 1
BC1 RW - - 1
Bit 0
BC0 RW - - 1
B
y
te 4
-
REVISION ID
-
-
-
Device ID 1
-
VENDOR ID
-
-
-
B
y
te 5
-
-
-
-
-
-
-
-
Byte 6
-
Writing to this register configures how
many bytes will be read back.
-
-
-
-
-
-
-
Device ID 6
Device ID 7 (MSB)
Device ID is 83 Hex
for 9DB803 and 43
Hex for 9DB403
Device ID 5
Device ID 4
Device ID 3
Device ID 0
Device ID 2

9DB803DFLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 8 OUTPUT PCIE GEN2 BUFFER
Lifecycle:
New from this manufacturer.
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