MAX5419LETA+T Datasheet MAX5418LETA+T, MAX5417LETA+T, MAX5419META+T | P10-P12

MAX5417/MAX5418/MAX5419

256-Tap, Nonvolatile, I

C-Interface,

Digital Potentiometers

10 ______________________________________________________________________________________

Acknowledge

The acknowledge bit is a clocked 9th bit that the recipient

uses to handshake receipt of each byte of data (Figure

6). Thus, each byte transferred effectively requires 9 bits.

The master generates the 9th clock pulse, and the recipi-

ent pulls down SDA during the acknowledge clock pulse,

so the SDA line is stable low during the high period of the

clock pulse. When the master transmits to the

MAX5417/MAX5418/MAX5419, the devices generate the

acknowledge bit because the MAX5417/MAX5418/

MAX5419 are the recipients.

Slave Address

The MAX5417/MAX5418/MAX5419 have a 7-bit-long

slave address (Figure 4). The 8th bit following the 7-bit

slave address is the NOP/W bit. Set the NOP/W bit low for

a write command and high for a no-operation command.

The MAX5417/MAX5418/MAX5419 are available in one

of four possible slave addresses (Table 1). The first 4

bits (MSBs) of the MAX5417/MAX5418/MAX5419 slave

addresses are always 0101. The next 2 bits are factory

programmed (see Table 1). Connect the A

input to

either GND or V

to toggle between two unique

device addresses for a part. Each device must have a

unique address to share the bus. Therefore, a maxi-

mum of eight MAX5417/MAX5418/MAX5419 devices

can share the same bus.

Table 1. MAX5417/MAX5418/MAX5419 Address Codes

ADDRESS BYTE

PART SUFFIX A6 A5 A4 A3 A2 A1 A0 NOP/W

L 0 1 0 1 0 0 0 NOP/W

L 0 1 0 1 0 0 1 NOP/W

M 0 1 0 1 0 1 0 NOP/W

M 0 1 0 1 0 1 1 NOP/W

N 0 1 0 1 1 0 0 NOP/W

N 0 1 0 1 1 0 1 NOP/W

P 0 1 0 1 1 1 0 NOP/W

P 0 1 0 1 1 1 1 NOP/W

SDA

DATA STABLE,

DATA VALID

CHANGE OF

DATA ALLOWED

SCL

Figure 5. Bit Transfer

SCL

START

CONDITION

SDA

289

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

Figure 6. Acknowledge

MAX5417/MAX5418/MAX5419

256-Tap, Nonvolatile, I

C-Interface,

Digital Potentiometers

______________________________________________________________________________________ 11

Message Format for Writing

A write to the MAX5417/MAX5418/MAX5419 consists of

the transmission of the device’s slave address with the

8th bit set to zero, followed by at least 1 byte of infor-

mation (Figure 7). The 1st byte of information is the

command byte. The bytes received after the command

byte are the data bytes. The 1st data byte goes into the

internal register of the MAX5417/MAX5418/MAX5419 as

selected by the command byte (Figure 8).

Command Byte

Use the command byte to select the source and desti-

nation of the wiper data (nonvolatile or volatile memory

registers) and swap data between nonvolatile and

volatile memory registers (see Table 2).

Command Descriptions

VREG: The data byte writes to the volatile memory reg-

ister and the wiper position updates with the data in the

volatile memory register.

NVREG: The data byte writes to the nonvolatile memo-

ry register. The wiper position is unchanged.

NVREGxVREG: Data transfers from the nonvolatile

memory register to the volatile memory register (wiper

position updates).

VREGxNVREG: Data transfers from the volatile memo-

ry register into the nonvolatile memory register.

0SLAVE ADDRESS CONTROL BYTE DATA BYTE

ACKNOWLEDGE FROM

MAX5417/MAX5418/MAX5419

NOP/W

1 BYTE

ACKNOWLEDGE FROM

MAX5417/MAX5418/MAX5419

ACKNOWLEDGE FROM

MAX5417/MAX5418/MAX5419

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

HOW CONTROL BYTE AND DATA BYTE MAP INTO

MAX5417/MAX5418/MAX5419 REGISTERS

S AA

S A0SLAVE ADDRESS CONTROL BYTE

ACKNOWLEDGE FROM

MAX5417/MAX5418/MAX5419

NOP/W

ACKNOWLEDGE FROM

MAX5417/MAX5418/MAX5419

D15 D14 D13 D12 D11 D10 D9 D8

CONTROL BYTE IS STORED ON RECEIPT OF STOP CONDITION

Figure 7. Command Byte Received

Figure 8. Command and Single Data Byte Received

MAX5417/MAX5418/MAX5419

256-Tap, Nonvolatile, I

C-Interface,

Digital Potentiometers

12 ______________________________________________________________________________________

ADDRESS BYTE CONTROL BYTE DATA BYTE

12345678 9 1011121314151617 18 19 20 21 22 23 2425 26 27 P

SCL CYCLE

NUMBER

A6 A5 A4 A3 A2 A1 A0 ACK

NV V R3 R2 R1 R0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK

VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0

NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0

NVREGxVREG 0101A2A1A00 01100001 XXXXXXXX

VREGxNVREG 0101A2A1A00 01010001 XXXXXXXX

Table 2. Command Byte Summary

Nonvolatile Memory

The internal EEPROM consists of an 8-bit nonvolatile

device is powered down. The nonvolatile register is

programmed with the midscale value at the factory.

Power-Up

Upon power-up, the MAX5417/MAX5418/MAX5419

load the data stored in the nonvolatile memory register

into the volatile memory register, updating the wiper

position with the data stored in the nonvolatile memory

Standby

The MAX5417/MAX5418/MAX5419 feature a low-power

standby. When the device is not being programmed, it

goes into standby mode and power consumption is

typically 500nA.

Applications Information

The MAX5417/MAX5418/MAX5419 are intended for cir-

cuits requiring digitally controlled adjustable resis-

tance, such as LCD contrast control (where voltage

biasing adjusts the display contrast), or for programma-

ble filters with adjustable gain and/or cutoff frequency.

Positive LCD Bias Control

Figures 9 and 10 show an application where the volt-

age-divider or variable resistor is used to make an

adjustable, positive LCD bias voltage. The op amp pro-

vides buffering and gain to the resistor-divider network

made by the potentiometer (Figure 9) or to a fixed

resistor and a variable resistor (see Figure 10).

Programmable Filter

Figure 11 shows the configuration for a 1st-order pro-

grammable filter. The gain of the filter is adjusted by

R2, and the cutoff frequency is adjusted by R3. Use the

following equations to calculate the gain (G) and the

3dB cutoff frequency (f

××

23π

OUT

30V

MAX5417

MAX5418

MAx5419

OUT

30V

MAX5417

MAX5418

MAX5419

Figure 9. Positive LCD Bias Control Using a Voltage-Divider

Figure 10. Positive LCD Bias Control Using a Variable Resistor

X = Don’t care.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P14

MAX5419LETA+T

Mfr. #:

Buy MAX5419LETA+T

Manufacturer:

Maxim Integrated

Description:

Digital Potentiometer ICs 256-Tap Nonvolatile I2C-Interface

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MAX5419LETA+T

MAX5419LETA+T

Products related to this Datasheet