9FGL0641AKILF Datasheet 9FGL0641BKILF, 9FGL0651BKILF, 9FGL0641BKILFT | P13-P15

DECEMBER 1, 2016 13 6-OUTPUT 3.3V PCIE CLOCK GENERATOR

9FGL06 DATASHEET

SMBus Table: Stop State Control

Byte 11 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

STP[1] RW 00 = Low/Low 10 = High/Low 0

Bit 0

STP[0] RW 01 = HiZ/HiZ 11 = Low/High 0

SMBus Table: Impedance Control

Byte 12 Name Control Function Type 0 1 Default

Bit 7

DIF2_imp[1] DIF2 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 6

DIF2_imp[0] DIF2 Zout RW 01=85Ω DIF Zout 11 = Reserved

Bit 5

DIF1_imp[1] DIF1 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 4

DIF1_imp[0] DIF1 Zout RW 01=85Ω DIF Zout 11 = Reserved

Bit 3

Bit 2

Bit 1

DIF0_imp[1] DIF0 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 0

DIF0_imp[0] DIF0 Zout RW 01=85Ω DIF Zout 11 = Reserved

SMBus Table: Impedance Control

Byte 13 Name Control Function Type 0 1 Default

Bit 7

DIF5_imp[1] DIF5 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 6

DIF5_imp[0] DIF5 Zout RW 01=85Ω DIF Zout 11 = Reserved

Bit 5

DIF4_imp[1] DIF4 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 4

DIF4_imp[0] DIF6 Zout RW 01=85Ω DIF Zout 11 = Reserved

Bit 3

Bit 2

Bit 1

DIF3_imp[1] DIF3 Zout RW 00=33Ω DIF Zout 10=100Ω DIF Zout

Bit 0

DIF3_imp[0] DIF3 Zout RW 01=85Ω DIF Zout 11 = Reserved

SMBus Table: Pull-up Pull-down Control

Byte 14 Name Control Function Type 0 1 Default

Bit 7

OE2_pu/pd[1] RW 00=None 10=Pup 0

Bit 6

OE2_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

Bit 5

OE1_pu/pd[1] RW 00=None 10=Pup 0

Bit 4

OE1_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

Bit 3

Bit 2

Bit 1

OE0_pu/pd[1] RW 00=None 10=Pup 0

Bit 0

OE0_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

Reserved

True/Complement DIF Output

Disable State

OE2 Pull-up(PuP)/

Pull-down(Pdwn) control

OE1 Pull-up(PuP)/

Pull-down(Pdwn) control

OE0 Pull-up(PuP)/

Pull-down(Pdwn) control

Reserved

see Note

Reserved

6-OUTPUT 3.3V PCIE CLOCK GENERATOR 14 DECEMBER 1, 2016

9FGL06 DATASHEET

SMBus Table: Pull-up Pull-down Control

Byte 15 Name Control Function Type 0 1 Default

Bit 7

OE5_pu/pd[1] RW 00=None 10=Pup 0

Bit 6

OE5_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

Bit 5

OE4_pu/pd[1] RW 00=None 10=Pup 0

Bit 4

OE4_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

Bit 3

Bit 2

Bit 1

OE3_pu/pd[1] RW 00=None 10=Pup 0

Bit 0

OE3_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 1

SMBus Table: Pull-up Pull-down Control

Byte 16 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

CKPWRGD_PD_pu/pd[1] RW 00=None 10=Pup 1

Bit 0

CKPWRGD_PD_pu/pd[0] RW 01=Pdwn 11 = Pup+Pdwn 0

Bytes 17 is Reserved

SMBus Table: Polarity Control

Byte 18 Name Control Function Type 0 1 Default

Bit 7

OE5_polarity Sets OE5 polarity RW Enabled when Low Enabled when High 0

Bit 6

OE4_polarity Sets OE4 polarity RW Enabled when Low Enabled when High 0

Bit 5

Bit 4

OE3_polarity Sets OE3 polarity RW Enabled when Low Enabled when High 0

Bit 3

OE2_polarity Sets OE2 polarity RW Enabled when Low Enabled when High 0

Bit 2

OE1_polarity Sets OE1 polarity RW Enabled when Low Enabled when High 0

Bit 1

Bit 0

OE0_polarity Sets OE0 polarity RW Enabled when Low Enabled when High 0

SMBus Table: Polarity Control

Byte 19 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CKPWRGD_PD

Determines

CKPWRGD_PD polarity

Power Down when

Low

Power Down when

High

CKPWRGD_PD Pull-up(PuP)/

Pull-down(Pdwn) control

Reserved

OE5 Pull-up(PuP)/

Pull-down(Pdwn) control

OE4 Pull-up(PuP)/

Pull-down(Pdwn) control

OE3 Pull-up(PuP)/

Pull-down(Pdwn) control

Reserved

DECEMBER 1, 2016 15 6-OUTPUT 3.3V PCIE CLOCK GENERATOR

9FGL06 DATASHEET

Recommended Crystal Characteristics (3225 package)

Marking Diagrams

Notes:

1. “LOT” is the lot sequence number.

2. “COO” denotes country of origin.

3. “YYWW” is the last two digits of the year and week that the part was assembled.

4. Line 2: truncated part number

5. “L” denotes RoHS compliant package.

6. “I” denotes industrial temperature range device.

7. “P” denotes factory programmable defaults

Thermal Characteristics

PARAMETER VALUE UNITS NOTES

Frequency 25 MHz 1

Resonance Mode Fundamental

Frequency Tolerance @ 25°C

20 PPM Max 1

Frequency Stability, ref @ 25°C Over

Operating Temperature Range

20 PPM Max 1

Temperature Range (commerical) 0~70 °

Temperature Range (industrial) -40~85 °

Equivalent Series Resistance (ESR) 50

Ω

Max 1

Shunt Capacitance (C

)7pF Max1

Load Capacitance (C

)8pF Max1

Drive Level 0.3 mW Max 1

Aging per year

±5

PPM Max 1

Notes:

1. FOX 603-25-150JA4C

ICS

GL0641BI

YYWW

COO

LOT

ICS

GL0651BI

YYWW

COO

LOT

ICS

6P1B000I

YYWW

COO

LOT

PARAMETER SYMBOL CONDITIONS PKG TYP. UNITS NOTES

Junction to Case 42 °

C/W

Junction to Base 2.4 °

C/W

JA0

Junction to Air, still air 39 °

C/W

JA1

Junction to Air, 1 m/s air flow 33 °

C/W

JA3

Junction to Air, 3 m/s air flow 28 °

C/W

JA5

Junction to Air, 5 m/s air flow 27 °

C/W

Thermal Resistance NDG40

ePad soldered to board

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

9FGL0641AKILF

Mfr. #:

Buy 9FGL0641AKILF

Manufacturer:

Description:

Clock Generators & Support Products 6 Output 3.3V PCIe 100 Ohm w/ ZO

Lifecycle:

New from this manufacturer.

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9FGL0641AKILF

9FGL0641AKILF

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