175MHZ, FEMTOCLOCK® VCXO BASED SONET/SDH JITTER
ATTENUATORS
17 Rev C 9/4/14
843002I-40 DATA SHEET
VCXO-PLL EXTERNAL COMPONENTS
Choosing the correct external components and having a proper
printed circuit board (PCB) layout is a key task for quality operation
of the VCXO-PLL. In choosing a crystal, special precaution must
be taken with the package and load capacitance (C
L
). In addition,
frequency, accuracy and temperature range must also be
considered. Since the pulling range of a crystal also varies with
the package, it is recommended that a metal-canned package like
HC49 be used. Generally, a metal-canned package has a larger
pulling range than a surface mounted device (SMD). For crystal
selection information, refer to the VCXO Crystal Selection
Application Note.
The crystal’s load capacitance C
L
characteristic determines it
resonating frequency and is closely related to the VCXO tuning
range. The total external capacitance seen by the crystal when
installed on a board is the sum of the stray board capacitance, IC
package lead capacitance, internal varactor capacitance and any
installed tuning capacitors (C
TUNE
).
If the crystal C
L
is greater than the total external capacitance, the
VCXO will oscillate at a higher frequency than the crystal
specification. If the crystal (C
L
) is lower than the total external
capacitance, the VCXO will oscillate at a lower frequency than the
crystal specification. In either case, the absolute tuning range is
reduced. The correct value of C
L
is dependant on the
characteristics of the VCXO. The recommended C
L
in the Crystal
Parameter Table balances the tuning range by centering the
tuning curve.
The VCXO-PLL Loop Bandwidth Selection Table shows R
S
, C
S
and C
P
values for recommended high, mid and low loop bandwidth
configurations. The device has been characterized using these
parameters. For other configurations, refer to the Loop Filter
Component Selection for VCXO Based PLLs Application Note.
The crystal and external loop
filter components should be
kept as close as possible to the
device. Loop filter and crystal
traces should be kept short and
separated from each other.
Other signal traces should be
kept separate and not run
underneath the device, loop
filter or crystal components.
VCXO Characteristics Table
VCXO-PLL Loop Bandwidth Selection Table
Crystal Characteristics
LF0
LF1
ISET
XTAL_IN
XTAL_OUT
R
S
C
S
C
P
R
SET
C
TUNE
C
TUNE
19.44MHz
Symbol Parameter Typical Units
k
VCXO
VCXO Gain 5800 Hz/V
C
V_LOW
Low Varactor Capacitance 12.6 pF
C
V_HIGH
High Varactor Capacitance 24.5 pF
Bandwidth Crystal Frequency (MHz) R
S
(k)C
S
(µF) C
P
(µF) R
SET
(k)
10Hz (Low) 19.44 5 1.0 0.10 9.5
70Hz (Mid) 19.44 10 1.0 0.01 4.75
100Hz (High) 19.44 15 1.0 0.01 4.75
Symbol Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
f
N
Frequency 19.44 MHz
f
T
Frequency Tolerance ±20 ppm
f
S
Frequency Stability ±20 ppm
Operating Temperature Range -40 +85
0
C
C
L
Load Capacitance 12 pF
C
O
Shunt Capacitance 4 pF
C
O
/ C
1
Pullability Ratio 220 240
ESR Equivalent Series Resistance 50
Drive Level 1mW
Aging @ 25
0
C ±3 per year ppm
