Rev C 9/4/14 4 175MHZ, FEMTOCLOCK® VCXO BASED SONET/SDH JITTER
ATTENUATORS
843002I-40 DATA SHEET
Function Tables
Table 3A. Input Reference Selection Function Table
Table 3B. Input Reference Divider Selection Function Table
Table 3C. Output Divider Selection Function Table
Input Function
CLK_SEL Input Selected
0 CLK0/nCLK0
1 CLK1/nCLK1
Inputs Function
R_SEL2 R_SEL1 R_SEL0 R Divider Value or State
000 ÷1
001 ÷2
010 ÷4
011 ÷8
100 ÷16
101 ÷32
1 1 0 bypass VCXO PLL
1 1 1 bypass VCXO and FemtoClock PLLs
Inputs Function
QX_SEL1 QX_SEL0 Output Divider Value or State
0 0 Output QX/nQX (High-Impedance)
01 ÷32
10 ÷8
11 ÷4
175MHZ, FEMTOCLOCK® VCXO BASED SONET/SDH JITTER
ATTENUATORS
5 Rev C 9/4/14
843002I-40 DATA SHEET
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
CC
= 3.3V±5%, V
CCO_LVCMOS,
V
CCO_LVPECL
= 3.3V±5% or 2.5V±5%, V
EE
= 0V,
T
A
= -40°C to 85°C
Item Rating
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, V
O
(LVCMOS)
Outputs, I
O
(LVPECL)
Continuos Current
Surge Current
-0.5V to V
CCO_LVCMOS
+ 0.5V
50mA
100mA
Package Thermal Impedance,
JA
37C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Core Supply Voltage 3.135 3.3 3.465 V
V
CCA
Analog Supply Voltage V
CC
– 0.15 3.3 V
CC
V
V
CCO_LVCMOS,
V
CCO_LVPECL
Output Supply Voltage
3.135 3.3 3.465 V
2.375 2.5 2.625 V
I
EE
Power Supply Current 210 mA
I
CCA
Analog Supply Current 15 mA
Rev C 9/4/14 6 175MHZ, FEMTOCLOCK® VCXO BASED SONET/SDH JITTER
ATTENUATORS
843002I-40 DATA SHEET
Table 4B. LVCMOS/LVTTL DC Characteristics, V
CC
= 3.3V±5%, V
CCO_LVCMOS
= 3.3V±5% or 2.5V±5%, V
EE
= 0V,
T
A
= -40°C to 85°C
Table 4C. Differential DC Characteristics, V
CC
= 3.3V±5%, V
CCO_LVPECL
= 3.3V±5% or 2.5V±5%, V
EE
= 0V,
T
A
= -40°C to 85°C
NOTE 1: V
IL
cannot be less than -0.3V
NOTE 2: Common mode input voltage is defined as V
IH
.
Table 4D. LVPECL DC Characteristics, V
CC
= V
CCO_LVPECL
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
NOTE 1: Outputs terminated with 50 to V
CCO_LVPECL
– 2V.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
CC
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current
QA_SEL[0:1],
QB_SEL[0:1]
V
CC
= V
IN
= 3.465V 5 µA
CLK_SEL,
R_SEL[0:2]
V
CC
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current
QA_SEL[0:1],
QB_SEL[0:1]
V
CC
= 3.465V, V
IN
= 0V -150 µA
CLK_SEL,
R_SEL[0:2]
V
CC
= 3.465V, V
IN
= 0V -5 µA
V
OH
Output High Voltage LOR0, LOR1
V
CCO_LVCMOS
= 3.465V,
I
OH
= 1mA
2.6 V
V
CCO_LVCMOS
= 2.625V,
I
OH
= 1mA
1.8 V
V
OL
Output Low Voltage LOR0, LOR1
V
CCO_LVCMOS
= 3.465V or
2.625V, I
OL
= -1mA
0.5 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
CLK0/nCLK0,
CLK1/nCLK1
V
CC
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current
CLK0, CLK1 V
CC
= 3.465V, V
IN
= 0V -5 µA
nCLK0, nCLK1 V
CC
= 3.465V, V
IN
= 0V -150 µA
V
PP
Peak-to-Peak Voltage; NOTE 1 0.15 1.3 V
V
CMR
Common Mode Input Voltage; NOTE 1, 2 V
EE
+ 0.5 V
CC
– 0.85 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CCO
– 1.4 V
CCO
– 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CCO
– 2.0 V
CCO
– 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V

843002AKI-40LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 2 LVPECL OUT VCXO/FEMTOCLOCK
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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