LT3092
13
3092fc
For more information www.linear.com/LT3092
applicaTions inForMaTion
Quieting the Noise
When a reduction in the noise of the current source is
desired, a small capacitor can be placed across R
SET
(C
SET
in Figure 7). Normally, the 10µA reference current source
generates noise current levels of 2.7pA/√Hz (0.7nA
RMS
over the 10Hz to 100kHz bandwidth). The SET pin resistor
generates a spot noise equal to i
n
= 4kT/R (k = Boltzmann’s
constant, 1.38 10
–23
J/°K, and T is absolute temperature)
which is RMS-summed with the noise generated by the
10µA reference current source. Placing a C
SET
capacitor
across R
SET
(as shown in Figure 7) bypasses this noise
current. Note that this noise reduction capacitor increases
start-up time as a factor of the time constant formed by
R
SET
C
SET
. When using a capacitor across the SET pin
resistor, the external pole introduced usually requires
compensation to maintain stability. See the Stability and
Frequency Compensation section for detailed descriptions
on compensating LT3092 circuits.
A curve in the Typical Performance Characteristics section
depicts noise spectral density for the reference current
over a 10Hz to 100kHz bandwidth.
Paralleling Devices
Obtain higher output current by paralleling multiple
LT3092s together. The simplest application is to run
two current sources side by side and tie their inputs
together and their outputs together, as shown in Figure
8. This allows the sum of the current sources to deliver
more output current than a single device is capable of
delivering.
Another method of paralleling devices requires fewer
components and helps to share power between devices.
Tie the individual SET pins together and tie the individual
IN pins together. Connect the outputs in common using
small pieces of PC trace as ballast resistors to promote
equal current sharing. PC trace resistance in milliohms/
inch is shown in Table 1. Ballasting requires only a tiny
area on the PCB.
Table 1. PC Board Trace Resistance
WEIGHT (oz) 10mil WIDTH 20mil WIDTH
1 54.3 27.1
2 27.1 13.6
Trace resistance is measured in mΩ/in
The worst-case room temperature offset, only ±2mV be-
tween the SET pin and the OUT pin, allows the use of very
small ballast resistors.
As shown in Figure 9, each LT3092 has a small 40mΩ
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
resistance of 40mΩ (20mΩ for the two devices in paral
-
lel) only adds about 8mV of output voltage compliance at
an output of 0.4A
. Of course, paralleling more than two
LT3092’s yields even higher output current. Spreading the
device on the PC board also spreads the heat. Series input
resistors can further spread the heat if the input-to-output
difference is high.
Thermal Considerations
The LT3092’s internal power and thermal limiting circuitry
protects itself under overload conditions. For continuous
normal load conditions, do not exceed the 125°C maximum
junction temperature. Carefully consider all sources of
thermal resistance from junction-to-ambient. This includes
(but is not limited to) junction-to-case, case-to-heat sink
Figure 7. Adding C
SET
Lowers Current Noise
3092 F07
IN
SET OUT
+
LT3092
10µA
C
COMP
OR
R
SET
R
OUT
R
COMP
C
COMP
C
SET
LT3092
14
3092fc
For more information www.linear.com/LT3092
applicaTions inForMaTion
interface, heat sink resistance or circuit board-to-ambient
as the application dictates. Consider all additional, adjacent
heat generating sources in proximity on the PCB.
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
PC board, copper traces and planes. Surface mount heat
sinks, plated through-holes and solder filled vias can also
spread the heat generated by power devices.
Junction-to-case thermal resistance is specified from the
IC junction to the bottom of the case directly, or the bot
-
tom of the pin most directly, in the heat path. This is the
lowest thermal resistance path for heat flow. Only proper
device mounting ensures the best possible thermal flow
from
this area of the package to the heat sinking material.
Note that the Exposed Pad of the DFN package and the
Tab of the SOT-223 package are electrically connected
to the output (V
OUT
).
The following tables list thermal resistance as a function
of copper areas in a fixed board size. All measurements
were taken in still air on a four-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Please reference
JEDEC standard JESD51-7 for further information on high
thermal conductivity test boards. Achieving low thermal
resistance necessitates attention to detail and careful layout.
Figure 8. Connect Two LT3092s for Higher Current
Figure 9. Parallel Devices
3092 F08
1.33Ω 1.33Ω
300Ω 300Ω
I
OUT
I
OUT
, 300mA
+
LT3092
10µA 10µA
+
LT3092
20k20k
IN IN
SET SETOUTOUTOUTOUT
3092 F09
I
OUT
I
OUT
, 400mA
+
LT3092
10µA
+
LT3092
10µA
R
2.5Ω
R
x
50k
40mΩ*
40mΩ*
*40mΩ PC BOARD TRACE
1V
IN IN
SET SET
R
x
=
V
IN MAX
(
)
R
90%
LT3092
15
3092fc
For more information www.linear.com/LT3092
Demo circuit 1531A’s board layout using multiple inner
V
OUT
planes and multiple thermal vias achieves 28°C/W
performance for the DFN package.
Table 2. DD Package, 8-Lead DFN
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
25°C/W
1000mm
2
2500mm
2
2500mm
2
25°C/W
225mm
2
2500mm
2
2500mm
2
28°C/W
100mm
2
2500mm
2
2500mm
2
32°C/W
*Device is mounted on topside
Table 3. TS8 Package, 8-Lead SOT-23
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
54°C/W
1000mm
2
2500mm
2
2500mm
2
54°C/W
225mm
2
2500mm
2
2500mm
2
57°C/W
100mm
2
2500mm
2
2500mm
2
63°C/W
*Device is mounted on topside
Table 4. ST Package, 3-Lead SOT-223
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
20°C/W
1000mm
2
2500mm
2
2500mm
2
20°C/W
225mm
2
2500mm
2
2500mm
2
24°C/W
100mm
2
2500mm
2
2500mm
2
29°C/W
*Device is mounted on topside
For further information on thermal resistance and using thermal information,
refer to JEDEC standard JESD51, notably JESD51-12.
Calculating Junction Temperature
Example: Given an industrial factory application with an
input voltage of 15V ±10%, an output voltage of 12V ±5%,
an output current of 200mA and a maximum ambient
temperature of 50°C, what would be the maximum junc-
tion temperature for a DFN package?
The total circuit power equals:
P
TOTAL
= (V
IN
– V
OUT
)(I
OUT
)
The SET pin current is negligible and can be ignored.
V
IN(MAX CONTINUOUS)
= 16.5 (15V + 10%)
V
OUT(MIN CONTINUOUS)
= 11.4V (12V – 5%)
I
OUT
= 200mA
Power dissipation under these conditions equals:
P
TOTAL
= (16.5 – 11.4V)(200mA) = 1.02W
Junction temperature equals:
T
J
= T
A
+ P
TOTAL
θ
JA
T
J
= 50°C + (1.02W 30°C/W) = 80.6°C
In this example, the junction temperature is below the
maximum rating, ensuring reliable operation.
Protection Features
The LT3092 incorporates several protection features ideal
for battery-powered circuits, among other applications.
In addition to normal circuit protection features such as
current limiting and thermal limiting, the LT3092 protects
itself against reverse-input voltages, reverse-output volt
-
ages, and reverse OUT-to-SET pin voltages.
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
For normal operation, do not exceed a junction temperature
of 125°C. The thermal shutdown circuits typical tempera
-
ture threshold is 165°C and has about 5°C of hysteresis.
The LT3092
s IN pin withstands
±40V voltages with respect
to the SET and OUT pins. Reverse-current flow, if OUT is
greater than IN, is less than 1mA (typically under 100µA),
protecting the LT3092 and sensitive loads.
Clamping diodes and 1k limiting resistors protect the
LT3092’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
handle ±10V differential voltages and ±15mA crosspin
current flow without concern.
applicaTions inForMaTion

LT3092EST#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Current & Power Monitors & Regulators 200mA Two Terminal Programmable Current Source
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union