NCP1602
www.onsemi.com
22
V
REF,LLINE
V
REF,BONOK
CSint VSNS
1.801 V if LLINE=1
1.392 V otherwise
0.819 V if BONOK=1
0.737 V otherwise
CSZCD
BUFFER
DEMAG
&
LINE SENSE
DRV
Figure 37. Input Line Sense Monitoring
Two−Level Boost Follower Line Level Dependent
The Two−Level Boost Follower feature is disabled by
default, but it is available on product versions [**B] &
[**D].
When the feature is enabled, the controller will regulate its
output voltage V
out
to a value dependent on the sensed line
level. The regulated ouput voltage V
out
uses a reference
voltage that has two possible values based on mains voltage.
For LLINE = 0 V
REF
= 2.5 V and for LLINE = 1
V
REF
=V
REF2
= 1.6 V so the output voltage will have for
example a 390 V value for Highline (LLINE = 0) and a
250 V value for Lowline (LLINE = 1).
In order for the Two−Level Boost Follower Line Level
Dependent feature to work OK with the the Brown−in
feature at startup, the controller will always start with
V
REF
= 2.5 V and then, once Brown−in validated and
switching started, the sensed line level will determine the
V
REF
value to be used and hence the V
out
value.
Thermal Shut−Down (TSD)
An internal thermal circuitry disables the circuit gate drive
and keeps the power switch off when the junction
temperature exceeds 150°C. The output stage is then
enabled once the temperature drops below about 100°C
(50°C hysteresis).
The temperature shutdown remains active as long as the
circuit is not reset, that is, as long as V
CC
is higher than a reset
threshold.
Output Drive Section
The output stage contains a totem pole optimized to
minimize the cross conduction current during high
frequency operation. Its high current capability (−500 mA /
+800 mA) allows it to effectively drive high gate charge
power MOSFET.
Second Over−Voltage Protection
On top of the existing overvoltage protection, a second
and redundant overvoltage protection named OVP2 has
been added. This overvoltage protection, senses, during
t
DEMAG
the value of V
out
, thru the R
CS1
, R
CS2
divider bridge
connected to the pin CS and compares it to an OVP2 voltage
reference V
REF,OVP2
. Because it is not possible to adjust the
V
REF,OVP2
reference to R
fb1
& Rf
b2
that programs the V
out
value, it has been decided to set V
REF,OVP2
and R
CS1
, R
CS2
in order to get OVP2 triggering for Vout voltages much
higher than for OVP condition (e.g. OVP2 goes high when
Vout goes higher than 438 V)
For V
out
= 438 V for OVP2 and given a K
CS
value equal
to 1/138 (K
CS
=R
CS2
/(R
CS1
+R
CS2
), this gives
V
REF,OVP2
= 3.175 V for the threshold voltage to which is
compared to the CS voltage during t
off
. When V
CS
goes
above V
REF,OVP2
threshold of the OVP2 comparator
(100 mV hysteresis), and after a 1−ms leading edge blanking
time, the OVP2 flag is latched and will stop the switching by
resetting the main PWM latch. The OVP2 latch is reset each
800 ms.
Two−level Boost Follower
In order to minimize the voltage between V
in
and V
out
for
avoiding the degradation of power efficiency, the internal
voltage references can be managed versus the line voltage
level condition (LLINE = 0 for High Line or LLINE = 1 for
Low Line).
If the “Two−level Boost Follower” feature is activated (by
default it is not activated), this will result in a regulated V
out
voltage for Low Line condition being 0.64 times the
regulated V
out
voltage for High Line condition.
OFF Mode
As previously mentioned, the circuit turns off when one
of the following faults is detected:
• Incorrect feeding of the circuit (“UVLO” high when
V
CC
<V
CC(off)
, V
CC(off)
equating 9 V typically).
• Excessive die temperature detected by the thermal
shutdown
• Under−Voltage Protection
• Brown−Out Fault and STATICOVP (see Figure 2)
