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Table 5. MAXIMUM RATINGS TABLE
Symbol Pin Rating Value Unit
VCTRL 1 V
CONTROL
pin −0.3, V
ctrl,max
(*) V
CS/ZCD 3 CS/ZCD Pin −0.3, +9 V
DRV 4 Driver Voltage
Driver Current
−0.3, V
DRV
(*)
−500, +800
V
mA
VCC 5 Power Supply Input −0.3, + 30 V
VCC 5 Maximum (dV/dt) that can be applied to VCC TBD upon test engineer
measurements
V/s
FB 6 Feedback Pin −0.3, +9 V
P
D
R
q
JA
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ T
A
=70°C
Thermal Resistance Junction to Air
550
145
mW
°C/W
T
J
Operating Junction Temperature Range −40 to+125 °C
T
J,max
Maximum Junction Temperature 150 °C
T
S,max
Storage Temperature Range −65 to 150 °C
T
L,max
Lead Temperature (Soldering, 10 s) 300 °C
MSL Moisture Sensitivity Level 1
ESD Capability, HBM model (Note 1) > 2000 V
ESD Capability, Charged Device Model (Note 1) > 1500 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*“V
ctrl,max
” is the VCTRL pin clamp voltage. “V
DRV
” is the DRV clamp voltage (V
DRVhigh
) if V
CC
is higher than (V
DRVhigh
). “V
DRV
” is V
CC
otherwise.
1. This device(s) contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC Standard JESD22−A114E
Charged Device Model Method 1500 V per JEDEC Standard JESD22−C101E.
2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
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Table 6. TYPICAL ELECTRICAL CHARACTERISTICS
(Conditions: V
CC
= 18 V, T
J
from −40°C to +125°C, unless otherwise specified) (Note 3)
Symbol
Rating Min Typ Max Unit
START−UP AND SUPPLY CIRCUIT
V
CC,on
Start−Up Threshold, V
CC
increasing:
[**C] & [**D] Versions
[**A] & [**B] Versions
9.75
15.80
10.50
17.00
11.25
18.20
V
V
CC,off
Minimum Operating Voltage, V
CC
falling 8.50 9.00 9.50 V
V
CC,hyst
Hysteresis (V
CC,on
V
CC,off
)
[**C] & [**D] Versions
[**A] & [**B] Versions
0.75
6.00
1.50
8.00
V
I
CC,start
Maximum Start−Up Current, for V
CC
lower than 9.4 V, below startup voltage 480
mA
I
CC,op1
Operating Consumption, no switching. 0.5 1.00 mA
I
CC,op2
Operating Consumption, 50−kHz switching, no load on DRV pin 2.00 3.00 mA
FREQUENCY FOLD−BACK DEAD TIME FOR CONFIGURATIONS L
2
= B, E, H @ K
m
= 2.28
t
DT,E,1
Dead−Time, V
ctrl
= 0.65V w/ E config 9.96 13.28 16.60
ms
t
DT,E,2
Dead−Time, V
ctrl
= 0.75V w/ E config 6.70 8.93 10.80
ms
CrM TO DCM THRESHOLD AND HYSTERESIS
V
ctrl,th,E
V
ctrl
threshold CrM to DCM mode w/ E config 1.398 1.553 1.708 V
SKIP CONTROL ([B**] & [D**] Versions)
V
SKIP−H
V
ctrl
pin SKIP Level, V
control
rising 555 617 678 mV
V
SKIP−L
V
ctrl
pin SKIP Level, V
control
falling 516 593 665 mV
V
SKIP−Hyst
V
ctrl
pin SKIP Hysteresis 30 mV
GATE DRIVE
t
R
Output voltage rise−time @ C
L
= 1 nF, 10−90% of output signal 30 ns
t
F
Output voltage fall−time @ C
L
= 1 nF, 10−90% of output signal 20 ns
R
OH
Source resistance @ 200 mV under High VCC 10 Ω
R
OL
Sink resistance @200 mV above Low VCC 7 Ω
V
DRV,low
DRV pin level for V
CC
= V
CC,off
+200 mV (10−kΩ resistor between DRV and GND) 8.0 V
V
DRV,high
DRV pin level at V
CC
= 30 V (R
L
= 33 kΩ & C
L
= 1 nF) 10 12 14 V
REGULATION BLOCK
V
REF
Feedback Voltage Reference 2.44 2.50 2.56 V
V
REF2,HL
Feedback Voltage Reference #2 @ High Line 2.44 2.50 2.56 V
V
REF2,LL
Feedback Voltage Reference #2 @ Low Line 1.56 1.60 1.64 V
I
EA
Error Amplifier Current Capability, Sinking and Sourcing 15 20 26
mA
G
EA
Error Amplifier Gain 110 200 290
mS
V
ctrl
V
ctrl,min
V
ctrl,max
VCTRL pin Voltage (V
ctrl
):
− @ V
FB
= 2 V (OTA is sourcing 20 mA)
− @ V
FB
= 3 V (OTA is sinking 20 mA)
4.5
0.5
V
V
V
out,
L / V
REF2
Ratio (V
out
Low Detect Threshold / V
REF
) (guaranteed by design) 95.5 %
H
out,
L / V
REF2
Ratio (V
out
Low Detect Hysteresis / V
REF
) (guaranteed by design) 0.35 %
I
BOOST
VCTRL pin Source Current when (V
OUT
Low Detect) is activated 147 220 277
mA
CURRENT SENSE AND ZERO CURRENT DETECTION BLOCKS
V
CS(th)
Current Sense Voltage Reference 450 500 550 mV
V
CS,OVS(th)
Current Sense Overstress Voltage Reference 675 750 825 mV
3. The above specification gives the targeted values of the parameters. The final specification will be available once the complete circuit
characterization has been performed.
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Table 6. TYPICAL ELECTRICAL CHARACTERISTICS
(Conditions: V
CC
= 18 V, T
J
from −40°C to +125°C, unless otherwise specified) (Note 3)
Symbol UnitMaxTypMinRating
CURRENT SENSE AND ZERO CURRENT DETECTION BLOCKS
t
LEB,OVS
“Overstress” Leading edge Blanking Time (guaranteed by design) 250 ns
t
LEB,OCP
“Over−Current Protection” Leading edge Blanking Time (guaranteed by design) 400 ns
t
OCP
Over−Current Protection Delay from V
CS/ZCD
>V
CS(th)
to
DRV low (dV
CS/ZCD
/ dt = 10 V/ms)
40 200 ns
V
ZCD(th)H
Zero Current Detection, V
CS/ZCD
rising 8 35 62 mV
V
ZCD(th)L
Zero Current Detection, V
CS/ZCD
falling −68 −46 −25 mV
V
ZCD(hyst)
Hysteresis of the Zero Current Detection Comparator 46 84 mV
To discuss versus what esd protection will be used
V
CL(pos)
CS/ZCD Positive Clamp @ I
CS/ZCD
= 5 mA (guaranteed by design) 9.5 V
t
ZCD
(V
CS/ZCD
< V
ZCD(th)L
) to (DRV high) 60 200 ns
t
SYNC
Minimum ZCD Pulse Width 110 200 ns
t
WDG
Watch Dog Timer 80 200 320
ms
t
WDG(OS)
Watch Dog Timer in “OverStress” Situation 400 800 1200
ms
I
ZCD(gnd)
Source Current for CS/ZCD pin impedance Testing 50
mA
I
ZCD(Vcc)
Pull−up current source referenced to V
cc
for open pin detection 200 nA
STATIC OVP
D
MIN
Duty Cycle, V
FB
= 3 V ( When low clamp of V
ctrl
is reached) 0 %
ON−TIME CONTROL (Option [*E*] for maximum t
ON
value)
t
on,LL,E
Maximum On Time, avg(V
cs
) = 0.9 V and V
ctrl
maximum (CrM) 11.4 12.5 13.6
ms
t
on,HL,E
Maximum On Time, avg(V
cs
) = 2.8 V and V
ctrl
maximum (CrM) 3.75 4.17 4.59
ms
K
ton,LL−HL
t
ON
@LL over t
ON
@HL ratio (all t
ON
versions) 3 w/o
Specifying max t
ON,min
means t
ON,min
can go down to zero
t
on,LL,min
Minimum On Time, avg(V
cs
) = 0.9 V
(not tested, guaranteed by design)
300 ns
t
on,HL,min
Minimum On Time, avg(V
cs
) = 2.8 V
(not tested, guaranteed by design)
200 ns
FEED−BACK OVER AND UNDER−VOLTAGE PROTECTIONS (OVP and UVP)
R
softOVP
Ratio (Soft OVP Threshold, V
FB
rising) over V
REF
(or V
REF2
)
(guaranteed by design)
105 %
R
softOVP(HYST)
Ratio (Soft OVP Hysteresis) over V
REF
(or V
REF2
) (guaranteed by design) 1.87 %
R
fastOVP
Ratio (Fast OVP Threshold, V
FB
rising) over V
REF
(or V
REF2
)
(guaranteed by design)
107 %
R
fastOVP(HYST)
Ratio (Fast OVP Hysteresis) over V
REF
(or V
REF2
) (guaranteed by design) 4.0 %
V
UVPH
UVP Threshold, V
FB
increasing 555 612 670 mV
V
UVPL
UVP Threshold, V
FB
decreasing 252 303 357 mV
V
UVP(HYST)
UVP Hysteresis 273 307 342 mV
I
B,FB
FB pin Bias Current @ V
FB
= V
OVP
and V
FB
= V
UVP
50 200 450 nA
BROWN−OUT PROTECTION AND FEED−FORWARD (Vsns is an internal pin that replaces Vsense)
V
BOH
Brown−Out Threshold V
mains
increasing, V
FB
based
([C**] and [D**] versions)
754 819 894 mV
3. The above specification gives the targeted values of the parameters. The final specification will be available once the complete circuit
characterization has been performed.

NCP1602BEASNT1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Power Factor Correction - PFC ENHANCED HIGH EFFICIENCY
Lifecycle:
New from this manufacturer.
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