PBLS4004D_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 6 January 2009 3 of 15
NXP Semiconductors
PBLS4004D
40 V PNP BISS loadswitch
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
P
tot
total power dissipation T
amb
25 °C
[1]
- 250 mW
[2]
- 350 mW
[3]
- 400 mW
TR2; NPN resistor-equipped transistor
V
CBO
collector-base voltage open emitter - 50 V
V
CEO
collector-emitter voltage open base - 50 V
V
EBO
emitter-base voltage open collector - 10 V
V
I
input voltage
positive - +40 V
negative - 10 V
I
O
output current - 100 mA
I
CM
peak collector current single pulse; t
p
1 ms - 100 mA
P
tot
total power dissipation T
amb
25 °C - 200 mW
Per device
P
tot
total power dissipation T
amb
25 °C
[1]
- 400 mW
[2]
- 530 mW
[3]
- 600 mW
T
j
junction temperature - 150 °C
T
amb
ambient temperature 65 +150 °C
T
stg
storage temperature 65 +150 °C
Table 5. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
PBLS4004D_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 6 January 2009 4 of 15
NXP Semiconductors
PBLS4004D
40 V PNP BISS loadswitch
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves
T
amb
(°C)
0 16012040 80
006aaa461
0.4
0.2
0.6
0.8
P
tot
(W)
0
(1)
(2)
(3)
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per device
R
th(j-a)
thermal resistance from
junction to ambient
in free air
[1]
- - 312 K/W
[2]
- - 236 K/W
[3]
- - 210 K/W
Per TR1; PNP low V
CEsat
transistor
R
th(j-sp)
thermal resistance from
junction to solder point
- - 105 K/W
PBLS4004D_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 6 January 2009 5 of 15
NXP Semiconductors
PBLS4004D
40 V PNP BISS loadswitch
FR4 PCB, standard footprint
Fig 2. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa462
10
1
10
2
10
3
Z
th(j-a)
(K/W)
10
1
10
5
1010
2
10
4
10
2
10
1
t
p
(s)
10
3
10
3
1
0.75
0.5
0.33
0.2
0.1
δ = 1
0.05
0.02
0.01
0
006aaa463
10
1
10
2
10
3
Z
th(j-a)
(K/W)
10
5
1010
2
10
4
10
2
10
1
t
p
(s)
10
3
10
3
1
0.75
0.5
0.33
0.2
0.1
δ = 1
0.05
0.02
0.01
0

PBLS4004D,115

Mfr. #:
Manufacturer:
Nexperia
Description:
Bipolar Transistors - Pre-Biased BISS LDSWITCH TAPE-7
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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