Philips Semiconductors
Si9410DY
N-channel TrenchMOS ™ logic level FET
Product data Rev. 03 — 23 January 2004 5 of 12
9397 750 12542
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9. Characteristics
Table 6: Characteristics
T
j
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
GS(th)
gate-source threshold voltage I
D
= 250 µA; V
DS
=V
GS
; Figure 9 1--V
I
DSS
drain-source leakage current V
DS
=24V; V
GS
=0V
T
j
=25°C --2µA
T
j
=55°C --25µA
I
GSS
gate-source leakage current V
GS
= ±20 V; V
DS
= 0 V - - 100 nA
R
DSon
drain-source on-state resistance V
GS
= 10 V; I
D
=7A;Figure 7 and 8 - 1930mΩ
V
GS
=5V; I
D
=4A;Figure 8 - 2340mΩ
V
GS
= 4.5 V; I
D
= 3.5 A; Figure 7 and 8 - 2550mΩ
Dynamic characteristics
g
fs
forward transconductance V
DS
=15V; I
D
=7A - 15 - S
Q
g(tot)
total gate charge I
D
= 7 A; V
DS
= 15 V; V
GS
=10V;Figure 13 - 14.6 50 nC
Q
gs
gate-source charge - 2 - nC
Q
gd
gate-drain (Miller) charge - 3 - nC
t
d(on)
turn-on delay time V
DD
=25V; R
D
=25Ω; V
GS
=10V; R
G
=6Ω - 5 30 ns
t
r
rise time - 6 60 ns
t
d(off)
turn-off delay time - 21 150 ns
t
f
fall time - 11 140 ns
Source-drain (reverse) diode
V
SD
source-drain (diode forward) voltage I
S
= 2 A; V
GS
=0V;Figure 12 - 0.85 1.1 V
t
rr
reverse recovery time I
S
= 2 A; dI
S
/dt = −100 A/µs; V
GS
= 0 V - 30 - ns