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NB6L295MMNG
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
NB6L295M
http://onsemi.com
10
Figure 9. Input Structure
50
W
50
W
VTx
VTx
V
CC
INx
INx
I
Figure 10. T
ypical CML Output Structure
and T
ermination
V
CCO
50
W
50
W
16 mA
50
W
50
W
V
CC
(Receiver)
GND
INx
V
th
INx
V
th
Figure 1
1. Differential Input Driven
Single
−
Ended
V
IH
V
IL
V
IHmax
V
ILmax
V
IH
V
th
V
IL
V
IHmin
V
ILmin
V
CC
V
thmax
V
thmin
GND
V
th
Figure 12. V
th
Diagram
INx
INx
Figure 13. Differential Inputs
Driven Differentially
V
ILD(MAX)
V
IHD(MAX)
V
IHD
V
ILD
V
IHD(MIN)
V
ILD(MIN)
V
CMR
GND
V
ID
= V
IHD
−
V
ILD
V
CC
INx
INx
Qx
Qx
t
PD
t
PD
V
OUTPP
= V
OH
(Qx)
−
V
OL
(Qx)
V
INPP
= V
IH
(INx)
−
V
IL
(INx)
Figure 14. Differential Inputs Driven
Differentially
Figure 15. V
CMR
Diagram
Figure 16. AC Reference Measurement
V
IHD
V
ILD
V
ID
= |V
IHD(INx)
−
V
ILD(INx)|
INx
INx
NB6L295M
http://onsemi.com
11
GND
V
CC
GND
L
VPECL
Driver
50
W
Z
o
= 50
W
Z
o
= 50
W
50
W
NB6L295M
V
CC
V
T
x
GND
V
CC
GND
CML
Driver
50
W
*
Z
o
= 50
W
Z
o
= 50
W
50
W
*
NB6L295M
V
T
x = V
T
x
= V
CC
Figure 17. L
VPECL Interface
Figure 18. L
VDS Interface
V
T
x = V
T
x
= V
CC
−
2.0 V
Figure 19. CML Interface, Standard 50
W
Load
GND
GND
L
VDS
Driver
50
W
*
Z
o
= 50
W
Z
o
= 50
W
50
W
*
NB6L295M
V
T
x = V
T
x
Figure 20. Capacitor
−
Coupled Differential
Interface (V
T
x/V
T
x
Connected to V
REF
AC
;
V
REF
AC
Bypassed to Ground with 0.1
m
F
Capacitor)
Figure 21. Capacitor
−
Coupled Single
−
Ended
Interface (V
T
x/V
T
x
Connected to External V
REF
AC
;
V
REF
AC
Bypassed to Ground with 0.1
m
F Capacitor)
V
T
x
V
T
x
V
T
x
V
T
x
V
T
x
V
CC
V
CC
V
CC
V
CC
INx
INx
INx
INx
INx
INx
GND
V
CC
GND
Differential
Driver
50
W
*
Z
o
= 50
W
Z
o
= 50
W
50
W
*
NB6L295M
V
T
x = V
T
x
= External V
REF
AC
V
T
x
V
T
x
V
REF
AC
V
CC
INx
INx
GND
V
CC
GND
50
W
*
Z
o
= 50
W
50
W
*
NB6L295M
V
T
x = V
T
x
= External V
REF
AC
V
T
x
V
T
x
V
REF
AC
V
CC
INx
INx
Single
−
Ended
Driver
NB6L295M
http://onsemi.com
12
Driver
Device
Receiver
Device
QD
Figure 22. T
ypical T
ermination for Output Driver and Device Evaluation
Q
D
V
CC
50
W
50
W
Z = 50
W
Z = 50
W
DUT
Figure 23. Output V
oltage Amplitude (V
OUTPP
) vs.
Output Frequency at Ambient T
emperature (T
ypical)
f
OUT
, CLOCK OUTPUT FREQUENCY (GHz)
1.5
1.0
0.5
0
800
V
OUTPP
, TYPICAL OUTPUT VOL
T
AGE
AMPLITUDE (mV)
700
600
500
400
300
200
100
0
ORDERING INFORMA
TION
Device
Package
Shipping
†
NB6L295MMNG
QFN
−
24
(Pb
−
free)
92 Units / Rail
NB6L295MMNTXG
QFN
−
24
(Pb
−
free)
3000 / T
ape & Reel
†
For information on tape and reel specifications, including part orientation and tape sizes, please refer
to our T
ape and Reel
Packaging
Specifications Brochure, BRD801
1/D.
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
NB6L295MMNG
Mfr. #:
Buy NB6L295MMNG
Manufacturer:
ON Semiconductor
Description:
Delay Lines / Timing Elements CML DUAL PROG DELAY
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
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Union
Products related to this Datasheet
NB6L295MMNTXG
NB6L295MMNG